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| 型号： | TVP5158PNPR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 颜色信号转换 |
| 英文描述： | COLOR SIGNAL DECODER, PQFP128 |
| 封装： | GREEN, PLASTIC, HTQFP-128 |
| 文件页数： | 41/108页 |
| 文件大小： | 1395K |
| 代理商： | TVP5158PNPR |
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SLES243E
– JULY 2009 – REVISED MARCH 2011
3.10.1 I
2C Write Operation
Data transfers occur utilizing the following formats.
An I2C master initiates a write operation to the decoder by generating a start condition (S) followed by the
decoder I2C address (as shown below), in MSB first bit order, followed by a 0 to indicate a write cycle.
After receiving an acknowledge from the decoder, the master presents the sub-address of the register, or
the first of a block of registers it wants to write, followed by one or more bytes of data, MSB first. The
decoder acknowledges each byte after completion of each transfer. The I2C master terminates the write
operation by generating a stop condition (P).
Step 1
0
I2C Start (master)
S
Step 2
7
6
5
4
3
2
1
0
I2C General address (master)
1
0
1
0
X
0
Step 3
9
I2C Acknowledge (slave)
A
Step 4
7
6
5
4
3
2
1
0
I2C Write register address (master)
Addr
Step 5
9
I2C Acknowledge (slave)
A
Step 6(1)
7
6
5
4
3
2
1
0
I2C Write data (master)
Data
Step 7(1)
9
I2C Acknowledge (slave)
A
Step 8
0
I2C Stop (master)
P
(1)
Repeat steps 6 and 7 until all data have been written.
3.10.2 I
2C Read Operation
The read operation consists of two phases. The first phase is the address phase. In this phase, an I2C
master initiates a write operation to the decoder by generating a start condition (S) followed by the
decoder slave address, in MSB first bit order, followed by a 0 to indicate a write cycle. After receiving
acknowledge from the decoder, the master presents the sub-address of the register or the first of a block
of registers it wants to read. After the cycle is acknowledged, the master has the option of generating a
stop condition or not.
In the data phase, an I2C master initiates a read operation to the decoder by generating a start condition
followed by the decoder I2C slave address (as shown below for a read operation), in MSB first bit order,
followed by a 1 to indicate a read cycle. After an acknowledge from the decoder, the I2C master receives
one or more bytes of data from the decoder. The I2C master acknowledges the transfer at the end of each
byte. After the last data byte has been transferred from the decoder, the master generates a not
acknowledge followed by a stop.
38
Functional Description
Copyright
2009–2011, Texas Instruments Incorporated
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