参数资料
型号: TZA3047BVH/C1,551
厂商: NXP Semiconductors
文件页数: 7/28页
文件大小: 0K
描述: IC LASER DRIVER 1.25GBPS 32-HBCC
标准包装: 490
类型: 激光二极管驱动器(光纤)
数据速率: 1.25Gbps
通道数: 1
电源电压: 3.14 V ~ 3.47 V
电流 - 电源: 40mA
电流 - 调制: 100mA
电流 - 偏置: 100mA
工作温度: -40°C ~ 85°C
封装/外壳: 32-HBCC
供应商设备封装: 32-HBCC(5x5)
包装: 托盘
安装类型: 表面贴装
其它名称: 568-1189
935270561551
TZA3047BVHW-S

Philips Semiconductors
30 Mbits/s up to 1.25 Gbits/s laser drivers
handbook, full pagewidth
Product speci?cation
TZA3047A; TZA3047B
VCCA
1
32
31
30
29
28
27
26
25
VCCD
DIN
DINQ
2
3
4
24
23
22
BIAS
GND
LA
TEST
CIN
CINQ
GND
5
6
7
8
TZA3047A
TZA3047B
21
20
19
18
LA
LAQ
LAQ
GND
9
10
11
12
13
14
15
16
17
PWA
MDB318
Fig.2 Pin configuration.
7
FUNCTIONAL DESCRIPTION
7.3
Pulse width adjustment
7.1
Data and clock input
The on-duration of the laser current can be adjusted from
The TZA3047 operates with differential Positive Emitter
Coupled Logic (PECL), Low Voltage Positive Emitter
Coupled Logic (LVPECL) and Current-Mode Logic (CML)
data and clock inputs with a voltage swing from 100 mV to
? 100 to +100 ps. The adjustment time is set by resistor
R PWA . The maximum allowable capacitive load on pin
PWA is 100 pF. Pulse width adjustment is disabled when
pin PWA is short-circuited to ground.
1 V (p-p). It is assumed that both the data and clock inputs
carry a complementary signal with the specified
7.4
Modulator output stage
peak-to-peak value (true differential excitation).
The circuit generates an internal common mode voltage
for AC-coupled data and clock inputs and for single-ended
applications.
If V DIN > V DINQ , the modulation current is sunk by the LA
pins and corresponds to an optical ‘one’ level of the laser.
The output stage is a high-speed bipolar differential pair
with typical rise and fall times of 120 ps and with a
modulation current source of up to 100 mA when the LA
pins are connected to V CCO .
The modulation current switches between the LA and LAQ
outputs. For a good RF performance the inactive branch
carries a small amount of the modulation current.
7.2
Retiming
The LA output is optimized for the laser allowing a 2 V
The retiming function synchronizes the data with the clock
to improve the jitter performance. The data latch switches
on the rising edge of the clock input. The retiming function
is disabled when both clock inputs are below 0.3 V.
At start-up the initial polarity of the laser is unknown before
the first rising edge of the clock input.
2003 Jun 05
7
dynamic range and a 1.2 V minimum voltage. The LAQ
output is optimized for the dummy load.
The output stage of the TZA3047A is optimized for
AC-coupled lasers and the output stage of the TZA3047B
is optimized for DC-coupled lasers.
The BIAS output is optimized for low voltage requirements
(0.4 V minimum for a 3.3 V laser supply; 0.8 V minimum
for a 5 V laser supply).
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