参数资料
型号: UBA2071ATS/N1,118
厂商: NXP Semiconductors
文件页数: 20/35页
文件大小: 0K
描述: IC DVR HALF BRIDGE 24-SSOP
标准包装: 1,000
类型: CCFL/EEFL 控制器
频率: 38 ~ 42kHz
电流 - 电源: 1.5mA
电源电压: 14V
工作温度: -25°C ~ 100°C
封装/外壳: 24-SSOP(0.209",5.30mm 宽)
供应商设备封装: 24-SSOP
包装: 带卷 (TR)
其它名称: 935285777118
NXP Semiconductors
UBA2071; UBA2071A
Half bridge control IC for CCFL backlighting
8.14.2 Overvoltage protection
The overvoltage control, see Section 8.9 , is intended to prevent the transformer output
voltage from exceeding its maximum rating. The overvoltage control level has to be at
least at the required lamp ignition voltage, otherwise the lamps may not ignite.
Once the lamps are on and in steady state, the transformer output voltage will usually be
about half the required ignition voltage for CCFLs. Thermal design of the transformers is
based on this lower voltage, not on the ignition voltage above which the overvoltage
control has to be. Hence the circuit might not stay in overvoltage regulation inde?nitely.
Therefore overvoltage regulation is combined with overvoltage protection.
When the voltage on the VFB pin exceeds the OV reference level V th(ov)(VFB) , the CVFB is
discharged, an overvoltage fault condition is signalled, PWM dimming is disabled, and the
fault timer is started. An internal latch makes the OV fault signal continuously high, even if
the voltage at the VFB pin only exceeds V th(ov)(VFB) during part of the output period. So the
peak of the voltage on the VFB pin determines if an overvoltage fault condition is seen. An
internal ?lter prevents the overvoltage fault condition from being reset when the voltage at
the VFB pin drops below the OV reference level for only one or two hf cycles.
In order to avoid an OV fault condition at the nominal switching frequency (with the lamps
operating normally), the voltage ripple on the VFB pin must not be too large.
8.14.3 Hard switching protection
As the UBA2071 and UBA2071A are intended to drive a half bridge at a high voltage, a
feature is included to ensure zero voltage switching. The design of the resonant load
should guarantee zero voltage switching under normal operating conditions. To prevent
overheating due to high switching losses in case of any abnormal operating condition,
hard switching of the half bridge is detected internally.
At the moment the high-side switch is turned on, the voltage step at the SH pin is
measured. If it is above V th(hsw)(SH) then PWM dimming is disabled and the fault timer is
started. Also, the frequency is increased by discharging the capacitor at the CVFB pin (by
I dch(CVFB) ).
8.14.4 Overvoltage extra protection
Though the hard switching protection as described in Section 8.14.3 , usually prevents the
circuit from getting at the wrong side of the resonance curve of the load (were the load
shows capacitive behavior), this might happen for instance when a lamp is suddenly
disconnected. The parasitic capacitance of the lamp and its connection wire may make up
a signi?cant part of the resonance circuit capacitance, so if a lamp is disconnected the
resonance frequency of the remaining load is suddenly higher and the switching
frequency might be at the capacitive side. Hard switching will occur and be detected. The
result is an increase in the switching frequency, which will make the situation worse: the
switching frequency comes closer to the resonance frequency of the remaining load,
creating a higher and potentially destructive transformer secondary voltage.
The OverVoltage Extra (OVE), protection prevents damage to the circuit by adding an
extra overvoltage protection level with quick response to that. When the voltage on the
VFB pin exceeds this OVE level V th(ovextra)(VFB) , an OVE fault condition is signalled. The IC
will stop if this happens during a couple of subsequent hf cycles. The time it takes before
the IC stops depends on a percentage of the time the VFB pin voltage exceeds the OVE
level and if hard switching is detected also. Figure 16 shows typical shutdown response
UBA2071_A_1
? NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 23 June 2008
20 of 35
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