参数资料
型号: UBA2071ATS/N1,118
厂商: NXP Semiconductors
文件页数: 8/35页
文件大小: 0K
描述: IC DVR HALF BRIDGE 24-SSOP
标准包装: 1,000
类型: CCFL/EEFL 控制器
频率: 38 ~ 42kHz
电流 - 电源: 1.5mA
电源电压: 14V
工作温度: -25°C ~ 100°C
封装/外壳: 24-SSOP(0.209",5.30mm 宽)
供应商设备封装: 24-SSOP
包装: 带卷 (TR)
其它名称: 935285777118
NXP Semiconductors
UBA2071; UBA2071A
Half bridge control IC for CCFL backlighting
8.2 V DD clamp
When the UBA2071 is disabled (EN pin low) or in the stop state, the V DD clamp is
activated. The V DD clamp is an internal active zener limiting the voltage to V clamp(VDD) . It
prevents the start-up current source from charging the V DD buffer capacitor to too high a
voltage.
The maximum current that is allowed to be delivered by the start-up current source is
determined by the clamp voltage as stated in Table 6 and the maximum allowed V DD
voltage as stated in Table 4 .
The UBA2071A has no V DD clamp.
8.3 Enable
The UBA2071 or UBA2071A can be activated or set to standby via the EN pin. If the
voltage on the EN pin is below V th(L)(EN) , the IC will stop oscillating at the next GL high
state 2 , and most parts of the internal circuits will shut down. When the EN pin is left open,
it is pulled low by an internal bias current of I bias(EN) .
When the voltage on the EN pin comes above V th(H)1(EN) , the IC will start up in
DC blocking capacitor charging mode (see Section 8.8 ). When the voltage on the EN pin
goes over V th(H)2(EN) , the IC will start with the initial ignition frequency sweep (see
Section 8.8 ) and subsequently go to normal operation mode again.
8.4 The oscillator
The UBA2071 and UBA2071A have an internal voltage controlled sawtooth oscillator, see
Figure 5 . Its frequency inverses in proportion to the capacitor connected to the CF pin.
The IC switches GL on and GH off during one oscillator period and GL off and GH on
during the next oscillator period. This results in a half bridge voltage with a frequency
(called the switching frequency f sw from here on) of half the oscillator frequency and with a
duty cycle of exactly 50 %.
The oscillator frequency is controlled by changing the charge current at the CF pin. By
changing the frequency the lamp current is controlled. It is also used to limit the
transformer output voltage and for gradually switching the lamps on and off during PWM
dimming.
2.
When both GH and GL are low during the lamps off period of PWM dimming (so PWMD is high), the IC will wait with entering the
standby state until PWMD becomes low again and GL can be made high.
UBA2071_A_1
? NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 23 June 2008
8 of 35
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