参数资料
| 型号： | UBA2071ATS/N1,118 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 26/35页 |
| 文件大小： | 0K |
| 描述： | IC DVR HALF BRIDGE 24-SSOP |
| 标准包装： | 1,000 |
| 类型： | CCFL/EEFL 控制器 |
| 频率： | 38 ~ 42kHz |
| 电流 - 电源： | 1.5mA |
| 电源电压： | 14V |
| 工作温度： | -25°C ~ 100°C |
| 封装/外壳： | 24-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 24-SSOP |
| 包装： | 带卷 (TR) |
| 其它名称： | 935285777118 |
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NXP Semiconductors
UBA2071; UBA2071A
Half bridge control IC for CCFL backlighting
Table 6. Characteristics …continued
T amb = 25 ° C; V VDD = 12 V; R IREF = 33 k ? ; V EN = V VDD and CPWM connected to a capacitor, unless otherwise speci?ed. All
voltages are measured with respect to signal ground (SGND, pin 10). SGND and PGND connected together. GL, GH,
COMM, NONFAULT and PWMD pins left open (unless otherwise speci?ed). Currents are positive when ?owing into the IC.
Parameters valid for all types (unless otherwise speci?ed).
Symbol
f PWM
I ch(CSWP)
I dch(CSWP)
Parameter
PWM frequency
charge current on pin CSWP
discharge current on pin
Conditions
C CPWM = 33 nF
PWMD low; V CSWP = 1 V
PWMD high; V CSWP = 1 V
Min
75
306
? 23
17
Typ
-
324
? 20
20
Max
1000
342
? 17
23
Unit
Hz
Hz
μ A
μ A
CSWP
R i(PWMA)
input resistance on pin PWMA
80
100
120
k ?
V i(PWMA)
δ PWM(min)
δ PWM(max)
δ PWMD
I source(PWMD)
I sink(PWMD)
V th(H)(PWMD)
input voltage on pin PWMA
minimum PWM duty cycle
maximum PWM duty cycle
duty cycle on pin PWMD
source current on pin PWMD
sink current on pin PWMD
HIGH-level threshold voltage
for minimum PWM duty cycle
for maximum PWM duty cycle
CPWM pin connected to SGND
V PWMD = 3 V
V PWMD = 1 V
-
-
-
-
-
12
-
-
-
1.24
3
12
0
100
-
0.6
1.2
-
-
-
-
-
-
100
-
-
1.7
V
V
%
%
%
%
mA
mA
V
on pin PWMD
V th(L)(PWMD)
LOW-level threshold voltage on
0.85
-
-
V
pin PWMD
Communication (COMM pin)
V L(clk)(COMM)
clock LOW-level voltage on pin I COMM = 10 μ A
0
0.1
0.2
V
COMM
I L(clk)(COMM)
clock LOW-level current on pin
V COMM = 1.5 V
-
5.0
-
mA
COMM
V H(clk)(COMM)
clock HIGH-level voltage on pin I COMM = ? 10 μ A
4
4.3
4.6
V
COMM
I H(clk)(COMM)
clock HIGH-level current on pin V COMM = 2.5 V
-
? 4.5
-
mA
COMM
V O(hbswoff)(COMM)
half bridge switch-off output
PWMD = 5 V
-
12
-
V
voltage on pin COMM
I th(det)hsw(COMM)
hard switching detection
Clock = high; PWMD = low
? 120
? 100
? 80
μ A
threshold current on pin
COMM
Protections
V th(osp)(VFB)
open/short protection threshold
50
100
150
mV
voltage on pin VFB
V th(ov)(VFB)
overvoltage threshold voltage
2.40
2.50
2.60
V
on pin VFB
R i(VFB)
I dch(CVFB)
input resistance on pin VFB
discharge current on pin CVFB V VFB < V th(osp)(VFB) or
500
17
670
20
840
23
k ?
μ A
V VFB > V th(ov)(VFB) ; V CVFB = 2 V
V th(ovextra)(VFB)
overvoltage extra threshold
2.9
3.0
3.1
V
voltage on pin VFB
UBA2071_A_1
? NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 23 June 2008
26 of 35
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