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| 型号： | UCC28250PWR |
| 厂商： | Texas Instruments |
| 文件页数： | 13/53页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR PWM CM/VM 20-TSSOP |
| 标准包装： | 2,000 |
| PWM 型： | 电流/电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 1MHz |
| 占空比： | 100% |
| 电源电压： | 4.7 V ~ 17 V |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽） |
| 包装： | 带卷 (TR) |
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SLUSA29C – APRIL 2010 – REVISED JULY 2011
RT (Oscillator Frequency Set and Synchronization) (15/2)
The UCC28250 oscillator frequency is set by an external resistor connected between the RT pin and ground.
Switching frequency selection is a trade-off between efficiency and component size. Based on the selected
switching frequency, the programming resistor value can be calculated as:
- T d ( SP )
R T =
1
2 ′ f SW
33.2pF
(3)
In this equation, f SW is the switching frequency and T D(sp) is the dead time between synchronous rectifier turn-off
to primary switch turn-on. T D(sp) is set by an external resistor between the SP pin and ground (refer to the SP pin
description).
Each output (OUTA, OUTB, SRA, SRB) switches at half the oscillator frequency (f SW = ? x f OSC ). Figure 6 shows
the relationship between RT and f OSC at certain T D(sp) and can be used to program oscillator frequency
accordingly.
OSCILLATOR FREQUENCY
vs
RT RESISTOR
2000
1800
T D(ps) = 40 ns
1600
1400
1200
1000
800
600
400
T D(ps) = 100 ns
200
0
0
20
40
60
80
100 120 140 160 180 200
RT Resistor - k W
Figure 6. Oscillator Frequency F OSC vs External Resistance of RT at T D(ps) = 40 ns and 100 ns
The UCC28250 can be synchronized to an external clock by applying an external clock source to the RT pin.
Synchronization helps with parallel operation and/or preventing beat frequency noise. The UCC28250
synchronizes its internal oscillator to an external frequency source ranging from 170 kHz to 2.3 MHz, which is
equivalent to an 85-kHz to 1.15-MHz switching frequency. The internal oscillator frequency is clamped to 170
kHz during synchronization if the external source frequency drops below 170 kHz.
The UCC28250 aligns the turn-on of primary outputs OUTA and OUTB to the falling edge of the synchronizing
signal, as shown in Figure 7 . If the frequency source is from the gate outputs of another half bridge controller,
interleaving can be achieved. The interleaving angle is determined by the frequency source ’ s duty cycle. When a
50% duty cycle is applied, optimal interleaving is achieved, and EMI filters can be minimized.
Copyright ? 2010 – 2011, Texas Instruments Incorporated
Product Folder Link(s): UCC28250
13
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