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2001
MOS FIELD EFFECT TRANSISTOR
μ
PA2753GR
SWITCHING
N-CHANNEL POWER MOS FET
DATA SHEET
Document No. G15782EJ1V0DS00 (1st edition)
Date Published February 2002 NS CP(K)
Printed in Japan
DESCRIPTION
The
μ
PA2753GR is Dual N-Channel MOS Field Effect
Transistor designed for DC/DC converters and power
management applications of notebook computers.
FEATURES
Dual chip type
Low on-state resistance
R
DS(on)1
= 21.4 m
MAX. (V
GS
= 10 V, I
D
= 4.0 A)
R
DS(on)2
= 31.6 m
MAX. (V
GS
= 4.5 V, I
D
= 4.0 A)
R
DS(on)3
= 36.4 m
MAX. (V
GS
= 4.0 V, I
D
= 4.0 A)
Low C
iss
: C
iss
= 620 pF TYP.
Built-in G - S protection diode
Small and surface mount package (Power SOP8)
ORDERING INFORMATION
PART NUMBER
PACKAGE
μ
PA2753GR
Power SOP8
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C, All terminals are connected.)
Drain to Source Voltage (V
GS
= 0 V)
Gate to Source Voltage (V
DS
= 0 V)
Drain Current (DC)
Drain Current (pulse)
Note1
Total Power Dissipation (1 unit)
Note2
Total Power Dissipation (2 unit)
Note2
Channel Temperature
Storage Temperature
Single Avalanche Current
Note3
Single Avalanche Energy
Note3
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T
P
T
T
ch
T
stg
I
AS
E
AS
30
±
20
±
8.0
±
32
1.7
2.0
150
V
V
A
A
W
W
°C
°C
A
mJ
–55 to + 150
8
6.4
Notes 1.
PW
≤
10
μ
s, Duty Cycle
≤
1%
2.
T
A
= 25°C, Mounted on ceramic substrate of 2000 mm
2
x 2.2 mm
3.
Starting T
ch
= 25°C, V
DD
= 15 V, R
G
= 25
, V
GS
= 20
→
0 V
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD. When
this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated
voltage may be applied to this device.
PACKAGE DRAWING (Unit: mm)
1.27
0.12 M
6.0 ±0.3
4.4
0.40
+0.10
0.78 Max.
0
1
1
0.8
0.5 ±0.2
0
+
–
5.37 Max.
0.10
1
4
8
5
1
2
7, 8
3
4
5, 6
; Source 1
; Gate 1
; Drain 1
; Source 2
; Gate 2
; Drain 2
EQUIVALENT CIRCUIT
(1/2 Circuit)
Source
Body
Diode
Gate
Protection
Diode
Gate
Drain