参数资料
型号: UPA2757GR-E1-AT
厂商: Renesas Electronics America
文件页数: 5/10页
文件大小: 0K
描述: MOSFET N-CH DUAL 30V 8-SOIC
标准包装: 2,500
FET 型: 2 个 N 沟道(双)
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 30V
电流 - 连续漏极(Id) @ 25° C: 5A
开态Rds(最大)@ Id, Vgs @ 25° C: 36 毫欧 @ 3A,10V
Id 时的 Vgs(th)(最大): 2.5V @ 1mA
闸电荷(Qg) @ Vgs: 10nC @ 10V
输入电容 (Ciss) @ Vds: 400pF @ 10V
功率 - 最大: 2W
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.173",4.40mm 宽)
供应商设备封装: 8-PSOP
包装: 带卷 (TR)
μ PA2757GR
ELECTRICAL CHARACTERISTICS (T A = 25 ° C. All terminals are connected.)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate to Source Cut-off Voltage
Note
Forward Transfer Admittance
SYMBOL
I DSS
I GSS
V GS(off)
| y fs |
TEST CONDITIONS
V DS = 30 V, V GS = 0 V
V GS = ± 16 V, V DS = 0 V
V DS = 10 V, I D = 1 mA
V DS = 10 V, I D = 3 A
MIN.
1.0
2.0
TYP.
MAX.
10
± 10
2.5
UNIT
μ A
μ A
V
S
Drain to Source On-state Resistance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Note
R DS(on)1
R DS(on)2
C iss
C oss
C rss
t d(on)
t r
t d(off)
V GS = 10 V, I D = 3.0 A
V GS = 4.5 V, I D = 3.0 A
V DS = 10 V,
V GS = 0 V,
f = 1 MHz
V DD = 15 V, I D = 3 A,
V GS = 10 V,
R G = 10 Ω
28.5
36.0
400
80
50
7
4
21
36.0
50.0
m Ω
m Ω
pF
pF
pF
ns
ns
ns
Fall Time
t f
5
ns
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Q G
Q GS
Q GD
I D = 5 A,
V DD = 24 V,
V GS = 10 V
10
1.5
2.7
nC
nC
nC
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Note
V F(S-D)
t rr
Q rr
I F = 5 A, V GS = 0 V
I F = 5 A, V GS = 0 V,
di/dt = 50 A/ μ s
0.86
20
16
V
ns
nC
Note Pulsed
<R>
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
PG.
V GS = 20 → 0 V
D.U.T.
R G = 25 Ω
50 Ω
L
V DD
PG.
D.U.T.
R G
R L
V DD
V GS
Wave Form
V GS
0
V DS
10%
V GS
90%
90%
90%
V DD
I D
I AS
BV DSS
V DS
V GS
0
τ
V DS
Wave Form
V DS
0
t d(on)
10%
t r
10%
t d(off)
t f
Starting T ch
τ = 1 μ s
Duty Cycle ≤ 1%
t on
t off
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
I G = 2 mA
R L
PG.
50 Ω
V DD
Data Sheet G18206EJ2V0DS
3
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