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参数资料
| 型号： | UPD4990AC-A |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDIP14 |
| 封装： | DIP-14 |
| 文件页数： | 14/51页 |
| 文件大小： | 211K |
| 代理商： | UPD4990AC-A |
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16
CHAPTER 2 FUNCTION SPECIFICATION
(6) INTERVAL TIMER CONTROL COMMAND
It can be selected interval timer period and interval timer stop, reset or start. The setting error of interval timer
is
±15.625 ms.
Command name
Function
C3’, C2’, C1’, C0’
INT 1 s
Output of 1 sec interval timer
1, 0, 0, 0
INT 10 s
Output of 10 sec interval timer
1, 0, 0, 1
INT 30 s
Output of 30 sec interval timer
1, 0, 1, 0
INT 60 s
Output of 60 sec interval timer
1, 0, 1, 1
Interval Reset
Interval timer is reset.
1, 1, 0, 0
(TP output is high impedance)
Interval Start
Interval timer is started
1, 1, 0, 1
(Timer isn’t reset.)
Interval Stop
Interval timer is stopped.
1, 1, 1, 0
(TP output status is continued.)
For example (INT 1 s)
1 s
0.5 s
1 s
Interval
Reset
Interval
Stop
Interval
Start
Note: After REGISTER HOLD COMMAND is read, Timing pulse of 64 Hz forcibly appeares to TP.
(7) TEST COMMAND (TEST MODE)
Time counter is input 8 192 Hz*. So time counter count up at 8 192 times speed. TEST MODE has two mode.
While OUT ENBL is low,
PD4990A is operated TEST MODE 1. While OUT ENBL is high, PD4990A is
operated TEST MODE 2. TEST MODE is canceled after REGISTER HOLD COMMAND is read.
*Note.
PD1990A is 1024 Hz.
TEST MODE 1 (OUT ENBL = L)
Each counters (sec, min, hour, day, day of week, month, year) are entered 8 192 Hz. Carry of counter isn’t
transferred to next counter.
Year
Counter
Month
Counter
Day of
Week
Counter
Day
Counter
Hour
Counter
Minute
Counter
Second
Counter
8,192 Hz
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