
CHAPTER 1 OUTLINE
User’s Manual U17473EJ2V0UD
26
1.8 Outline of Functions
(1/2)
Item
μPD78F0393 μPD78F0394 μPD78F0395 μPD78F0396 μPD78F0397 μPD78F0397D
Flash memory
(self-programming
supported)
Note 1
32 K
48 K
60 K
96 K
128 K
Bank
Note 2
4
6
High-speed RAM
Note 1
1 K
Expansion RAM
Note 1
1 K
2 K
4 K
6 K
Internal
memory
(bytes)
LCD display RAM
40
× 4 bits
Memory space
64 KB
High-speed system
clock
X1 (crystal/ceramic) oscillation, external main system clock input (EXCLK)
1 to 20 MHz: VDD = 4.0 to 5.5 V, 1 to 10 MHz: VDD = 2.7 to 5.5 V,
1 to 5 MHz: VDD = 1.8 to 5.5 V
Main system
clock
(oscillation
frequency)
Internal high-speed
oscillation clock
Internal oscillation
8 MHz (TYP.): VDD = 1.8 to 5.5 V
Subsystem clock
(oscillation frequency)
XT1 (crystal) oscillation, external subsystem clock input (EXCLKS)
32.768 kHz (TYP.): VDD = 1.8 to 5.5 V
Internal low-speed oscillation clock
(for TMH1, WDT)
Internal oscillation
240 kHz (TYP.): VDD = 1.8 to 5.5 V
General-purpose registers
8 bits
× 32 registers (8 bits × 8 registers × 4 banks)
0.1
μs (high-speed system clock: @ fXH = 20 MHz operation)
0.25
μs (internal high-speed oscillation clock: @ fRH = 8 MHz (TYP.) operation)
Minimum instruction execution time
122
μs (subsystem clock: @ fSUB = 32.768 kHz operation)
Instruction set
16-bit operation
Multiply/divide (8 bits
× 8 bits, 16 bits ÷ 8 bits)
Bit manipulate (set, reset, test, and Boolean operation)
BCD adjust, etc.
I/O ports
CMOS I/O: 40
16-bit
timer/event
counter:
1 channel
16-bit timer/event counter: 2 channels
Timers
8-bit timer/event counter: 2 channels
8-bit timer: 2 channels
Watch timer: 1 channel
Watchdog timer: 1 channel
Timer outputs
5 (PWM
output: 4)
6 (PWM output: 4)
Clock output
156.25 kHz, 312.5 kHz (peripheral hardware clock: @ fPRS = 20 MHz operation)
32.768 kHz (subsystem clock: @ fSUB = 32.768 kHz operation)
Notes 1. The internal flash memory capacity, internal high-speed RAM capacity, and internal expansion RAM
capacity can be changed using the internal memory size switching register (IMS) and the internal
expansion RAM size switching register (IXS).
2. Banks to be used can be changed using the bank select register (BANK).