
CHAPTER 2 PIN FUNCTIONS
User’s Manual U17473EJ2V0UD
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2.2.5 P60, P61 (port 6)
P60 and P61 function as a 2-bit I/O port. These pins also function as pins for serial interface clock I/O and data I/O.
The following operation modes can be specified in 1-bit units.
(1) Port mode
P60 and P61 function as a 2-bit I/O port. P60 and P61 can be set to input port or output port in 1-bit units using
port mode register 6 (PM6).
Output of P60 and P61 is N-ch open-drain output (6 V tolerance).
(2) Control mode
P60 and P61 function as serial interface clock I/O and data I/O.
(a) SCL0
This is a serial clock I/O pin for serial interface IIC0.
Be sure to pull the SCL0 pin up externally.
(b) SDA0
This is a serial data I/O pin for serial interface IIC0.
Be sure to pull the SDA0 pin up externally.
Caution In the 78K0/LG2, be sure to use the P60/SCL0 and P61/SDA0 as the serial clock I/O pin and serial data
I/O pin, respectively, in accordance with the specifications.
2.2.6 P70 to P77 (port 7)
P70 to P77 function as an 8-bit I/O port. These pins also function as key interrupt input pins.
The following operation modes can be specified in 1-bit units.
(1) Port mode
P70 to P77 function as an 8-bit I/O port. P70 to P77 can be set to input or output port in 1-bit units using port
mode register 7 (PM7). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 7
(PU7).
(2) Control mode
P70 to P77 function as key interrupt input pins.
2.2.7 P120 to P124 (port 12)
P120 to P124 function as a 5-bit I/O port. These pins also function as pins for external interrupt request input,
potential input for external low-voltage detection, resonator for main system clock connection, resonator for subsystem
clock connection, and external clock input. The following operation modes can be specified in 1-bit units.
(1) Port mode
P120 to P124 function as a 5-bit I/O port. P120 to P124 can be set to input or output port using port mode
register 12 (PM12). Only for P120, use of an on-chip pull-up resistor can be specified by pull-up resistor option
register 12 (PU12).
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