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参数资料
| 型号： | V62/04752-01XE |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | 3 A SWITCHING CONTROLLER, 2000 kHz SWITCHING FREQ-MAX, PDSO28 |
| 封装： | GREEN, PLASTIC, SOIC-28 |
| 文件页数： | 13/15页 |
| 文件大小： | 389K |
| 代理商： | V62/04752-01XE |
UC2875EP
PHASE SHIFT RESONANT CONTROLLER
SGLS233A FEBRUARY 2004 REVISED DECEMBER 2008
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION AND OPERATION INFORMATION
Pin Descriptions
CLOCKSYNC (bi-directional clock and synchronization pin): Used as an output, this pin provides a clock signal.
As an input, this pin provides a synchronization point. In its simplest usage, multiple devices, each with their
own local oscillator frequency, may be connected together by the CLOCKSYNC pin and will synchronize on the
fastest oscillator. This pin may also be used to synchronize the device to an external clock, provided the external
signal is of higher frequency than the local oscillator. A resistor load may be needed on this pin to minimize the
clock pulse width.
E/AOUT (error amplifier output): This is is the gain stage for overall feedback control. Error amplifier output
voltage levels below 1 volt will force 0
_ phase shift. Since the error amplifier has a relatively low current drive
capability, the output may be overridden by driving with a sufficiently low impedance source.
CS+ (current sense):The non-inverting input to the current- fault comparator whose reference is set internally
to a fixed 2.5 V (separate from VREF). When the voltage at this pin exceeds 2.5 V the current-fault latch is set,
the outputs are forced OFF and a SOFT-START cycle is initiated. If a constant voltage above 2.5 V is applied
to this pin the outputs are disabled from switching and held in a low state until the CS+ pin is brought below 2.5 V.
The outputs may begin switching at 0 degrees phase shift before the SOFTSTART pin begins to rise this
condition will not prematurely deliver power to the load.
FREQSET (oscillator frequency set pin): A resistor and a capacitor from FREQSET to GND will set the oscillator
frequency.
DELAYSET AB, DELAYSET CD (output delay control): The user programmed current flowing from these
pins to GND set the turn-on delay for the corresponding output pair. This delay is introduced between turn-off
of one switch and turn-on of another in the same leg of the bridge to provide a dead time in which the resonant
switching of the external power switches takes place. Separate delays are provided for the two half-bridges to
accommodate differences in the resonant capacitor charging currents.
EA (error amplifier inverting input): This is normally connected to the voltage divider resistors which sense the
power supply output voltage level.
EA+ (error amplifier non-inverting input): This is normally connected to a reference voltage used for comparison
with the sensed power supply output voltage level at the EA+ pin.
GND (signal ground):All voltages are measured with respect to GND. The timing capacitor, on the FREQSET
pin, any bypass capacitor on the VREF pin, bypass capacitors on VIN and the ramp capacitor, on the RAMP
pin, should be connected directly to the ground plane near the signal ground pin.
OUTAOUTD (outputs AD): The outputs are 2 A totem- pole drivers optimized for both MOSFET gates and
level-shifting transformers. The outputs operate as pairs with a nominal 50% duty-cycle. The AB pair is
intended to drive one half-bridge in the external power stage and is syncronized with the clock waveform. The
CD pair will drive the other half-bridge with switching phase shifted with respect to the AB outputs.
PWRGND (power ground):VC should be bypassed with a ceramic capacitor from the VC pin to the section of
the ground plane that is connected to PWRGND. Any required bulk reservoir capacitor should parallel this one.
Power ground and signal ground may be joined at a single point to optimize noise rejection and minimize DC
drops.
RAMP (voltage ramp):This pin is the input to the PWM comparator. Connect a capacitor from here to GND. A
voltage ramp is developed at this pin with a slope:
dV
dT
+
SenseVoltage
R
SLOPE
C
RAMP
Current mode control may be achieved with a minimum amount of external circuitry, in which case this pin
provides slope compensation.
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