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| 型号： | V62/04752-01XE |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | 3 A SWITCHING CONTROLLER, 2000 kHz SWITCHING FREQ-MAX, PDSO28 |
| 封装： | GREEN, PLASTIC, SOIC-28 |
| 文件页数： | 2/15页 |
| 文件大小： | 389K |
| 代理商： | V62/04752-01XE |
UC2875EP
PHASE SHIFT RESONANT CONTROLLER
SGLS233A FEBRUARY 2004 REVISED DECEMBER 2008
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION AND OPERATION INFORMATION
Syncing to External TTL/CMOS
Figure 6. Snychronizing to an External TTL/CMOS Clock Signal
ICs will sync to fastest chip or TTL clock if it is higher frequency.
R and RN may be needed for same reasons as above.
Although each UC2875 has a local oscillator frequency, the group of devices will synchronize to the fastest
oscillator driving the CLOCKSYNC pin. This arrangement allows the synchronizing connection between ICs to
be broken without any local loss of functionality.
Synchronizing the device to an external clock signal may be accomplished with a minimum of external circuitry,
as shown in Figure 6.
Capacitive loading on the CLOCKSYNC pin will increase the clock pulse width, and may adversely effect system
performance. Therefore, a resistor to ground from the CLOCKSYNC pin is optional, but may be required to offset
capacitive loading on this pin. These resistors are shown in the oscillator schematics as R1, RN.
Delay Blocks and Output Stages
In each of the output stages, transistors Q3 through Q6 form a high-speed totem-pole driver which will source
or sink more than one amp peak with a total delay of approximately 30 nanoseconds. To ensure a low output
level prior to turn-on, transistors Q7 through Q9 form a self-biased driver to hold Q6 on prior to the supply
reaching its turn-on threshold. This circuit is operable when the chip supply is zero. Q6 is also turned on and
held low with a signal from the fault logic portion of the chip.
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