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参数资料
| 型号： | V827332U04S |
| 厂商： | Mosel Vitelic, Corp. |
| 英文描述： | 2.5 VOLT 32M x 72 HIGH PERFORMANCE REGISTERED ECC DDR SDRAM MODULE |
| 中文描述： | 2.5伏32M × 72配置高性能寄存ECC DDR SDRAM内存模块 |
| 文件页数： | 12/14页 |
| 文件大小： | 294K |
| 代理商： | V827332U04S |
MOSEL VITELIC
V827332U04S
7
V827332U04S Rev. 1.2 March 2002
DC Operating Conditions
(TA = 0 to 70°C, Voltage referenced to VSS = 0V)
Notes: 1. VDDQ must not exceed the level of VDD.
2. VIL (min) is acceptable -1.5V AC pulse width with 5ns of duration.
3. The value of VREF is approximately equal to 0.5VDDQ.
AC Operating Conditions
(TA = 0 to 70 °C, Voltage referenced to VSS = 0V)
Notes: 1. VID is the magnitude of the difference between the input level on CK and the input on CK.
2. The value of VIX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the DC level of the
same.
Parameter
Symbol
Min
Typ.
Max
Unit
Note
Power Supply Voltage
VDD
2.3
2.5
2.7
V
Power Supply Voltage
VDDQ
2.3
2.5
2.7
V
1
Input High Voltage
VIH
VREF + 0.15
-
VDDQ + 0.3
V
Input Low Voltage
VIL
-0.3
-
VREF - 0.15
V
2
I/O Termination Voltage
VTT
VREF - 0.04
VREF
VREF + 0.04
V
Reference Voltage
VREF
1.15
1.25
1.35
V
3
Input Leakage Current
II
-2
-
2
A
Output Leakage Current
IOz
-5
-
5
A
Output High Current (VOUT = 1.95V)
IOH
-16.8
-
mA
Output Low Current (VOUT = 0.35V)
IOL
16.8
-
mA
Parameter
Symbol
Min
Max
Unit
Note
Input High (Logic 1) Voltage, DQ, DQS and DM signals
VIH(AC)
VREF + 0.31
V
Input Low (Logic 0) Voltage, DQ, DQS and DM signals
VIL(AC)
VREF - 0.31
V
Input Differential Voltage, CK and CK inputs
VID(AC)
0.7
VDDQ + 0.6
V
1
Input Crossing Point Voltage, CK and CK inputs
VIX(AC)
0.5*VDDQ-0.2
0.5*VDDQ+0.2
V2
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