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参数资料
| 型号： | V827332U04S |
| 厂商： | Mosel Vitelic, Corp. |
| 英文描述： | 2.5 VOLT 32M x 72 HIGH PERFORMANCE REGISTERED ECC DDR SDRAM MODULE |
| 中文描述： | 2.5伏32M × 72配置高性能寄存ECC DDR SDRAM内存模块 |
| 文件页数： | 2/14页 |
| 文件大小： | 294K |
| 代理商： | V827332U04S |
10
MOSEL VITELIC
V827332U04S
V827332U04S Rev. 1.2 March 2002
AC Characteristics (AC operating conditions unless otherwise noted)
Parameter
Symbol
(PC1600)
(PC2100B)
(PC2100A)
Unit
Note
Min
Max
Min
Max
Min
Max
Row Cycle Time
tRC
60
-
65
-
70
-
ns
Auto Refresh Row Cycle Time
tRFC
67
-
75
-
80
-
ns
Row Active Time
tRAS
45
120K
48
120K
50
120K
ns
Row Address to Column Address Delay
tRCD
18
-
20
-
20
-
ns
Row Active to Row Active Delay
tRRD
14
-
15
-
15
-
ns
Column Address to Column Address Delay
tCCD
1
-
1
-
1
-
CLK
Row Precharge Time
tRP
18
-
20
-
20
-
ns
Write Recovery Time
tWR
15
-
15
-
15
-
ns
Last Data-In to Read Command
tDRL
1
-
1
-
1
-
CLK
Auto Precharge Write Recovery + Precharge Time
tDAL
35
-
35
-
35
-
ns
System Clock Cycle Time
CAS Latency = 2.5
tCK
7
12
7.5
12
8
12
ns
CAS Latency = 2
7.5
12
10
12
10
12
ns
Clock High Level Width
tCH
0.45
0.55
0.45
0.55
0.45
0.55
CLK
Clock Low Level Width
tCL
0.45
0.55
0.45
0.55
0.45
0.55
CLK
Data-Out edge to Clock edge Skew
tAC
-0.75
0.75
-0.75
0.75
-0.8
0.8
ns
DQS-Out edge to Clock edge Skew
tDQSCK
-0.75
0.75
-0.75
0.75
-0.8
0.8
ns
DQS-Out edge to Data-Out edge Skew
tDQSQ
-
0.5
-
0.5
-
0.6
ns
Data-Out hold time from DQS
tQH
tHPmin
-0.75ns
-
tHPmin
-0.75ns
-
tHPmin
-0.75ns
-
ns
1
Clock Half Period
tHP
tCH/L
min
-
tCH/L
min
-
tCH/L
min
-
ns
1
Input Setup Time (fast slew rate)
tIS
0.9
-
0.9
-
1.1
-
ns
2,3,5,6
Input Hold Time (fast slew rate)
tIH
0.9
-
0.9
-
1.1
-
ns
2,3,5,6
Input Setup Time (slow slew rate)
tIS
1.0
-
1.0
-
1.1
-
ns
2,4,5,6
Input Hold Time (slow slew rate)
tIH
1.0
-
1.0
-
1.1
-
ns
2,4,5,6
Input Pulse Width
tIPW
2.2
-
2.2
-
ns
6
Write DQS High Level Width
tDQSH
0.4
0.6
0.4
0.6
0.4
0.6
CLK
Write DQS Low Level Width
tDQSL
0.4
0.6
0.4
0.6
0.4
0.6
CLK
CLK to First Rising edge of DQS-In
tDQSS
0.75
1.25
0.75
1.25
0.75
1.25
CLK
Data-In Setup Time to DQS-In (DQ & DM)
tDS
0.5
-
0.5
-
0.6
-
ns
7
Data-in Hold Time to DQS-In (DQ & DM)
tDH
0.5
-
0.5
-
0.6
-
ns
7
DQ & DM Input Pulse Width
tDIPW
1.75
-
1.75
-
2
-
ns
Read DQS Preamble Time
tRPRE
0.9
1.1
0.9
1.1
0.9
1.1
CLK
Read DQS Postamble Time
tRPST
0.4
0.6
0.4
0.6
0.4
0.6
CLK
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相关代理商/技术参数 |
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| V827432K24S | 制造商:MOSEL 制造商全称:MOSEL 功能描述:2.5 VOLT 32M x 72 HIGH PERFORMANCE UNBUFFERED ECC DDR SDRAM MODULE |
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| V827464N24S | 制造商:MOSEL 制造商全称:MOSEL 功能描述:2.5 VOLT 64M x 72 HIGH PERFORMANCE REGISTERED ECC DDR SDRAM MODULE |
| V8290 | 制造商:Visual Effects 功能描述:Mini Strobe Light 制造商:VISUAL EFFECTS 功能描述:MINI STROBE LIGHT |
| V82MA3A | 功能描述:压敏电阻 82V 40A 120pF RoHS:否 制造商:EPCOS 产品:MLV 电压额定值 DC:22 V 电压额定值 AC:17 V 钳位电压:50 V 直径: 峰值浪涌电流:30 A 浪涌能量额定值:75 mJ 电容:74.2 pF 工作温度范围:- 55 C to + 125 C 安装:SMD/SMT 封装:Reel |
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