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参数资料
| 型号： | VNC2-64Q1B-REEL |
| 厂商： | FTDI, Future Technology Devices International Ltd |
| 文件页数： | 50/88页 |
| 文件大小： | 0K |
| 描述： | IC USB HOST/DEVICE CTRL 64-QFN |
| 应用说明： | Vinculum-II IO Cell Description AppNote Vinculum-II Debug Interface Description AppNote Vinculum-II IO Mux Explained AppNote Vinculum-II PWM Example AppNote Migrating Vinculum Designs AppNote |
| 特色产品： | Vinculum VNC2 |
| 标准包装： | 1 |
| 系列： | Vinculum-II |
| 控制器类型： | USB 2.0 控制器 |
| 接口： | USB，主机/设备配置，UART，SPI，PWM，闪存 256K，DMA 4CH |
| 电源电压： | 1.62 V ~ 1.98 V |
| 电流 - 电源： | 25mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘 |
| 供应商设备封装： | 64-QFN（8x8） |
| 包装： | 标准包装 |
| 产品目录页面： | 634 (CN2011-ZH PDF) |
| 其它名称： | 768-1046-6 |
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Copyright 2009-2011 Future Technology Devices International Limited
Datasheet
Vinculum-II Embedded Dual USB Host Controller IC
Version 1.5
Document No.: FT_000138 Clearance No.: FTDI# 143
64 Pin
Package
Available
pins
48 Pin
Package
Available
pins
32 Pin
Package
Available
pins
Name
Type
Description
12, 16,
20, 25,
29, 40,
44, 48,
52, 58,
62
12,16,
21, 32,
36, 42,
46
12, 24,
30
spi_m_mosi
Output
Master Out Slave In
Synchronous data from master to slave
13, 17,
22, 26,
31, 41,
45, 49,
55, 59,
63
13, 18,
22, 33,
37, 43,
47
14, 25,
31
spi_m_miso
Input
Master In Slave Out
Synchronous data from slave to master
14, 18,
23, 27,
32, 42,
46, 50,
56, 60,
64
14, 19,
23, 34,
38, 44,
48
15, 26,
32
spi_m_ss_0#
Output
Active low slave select 0 from master to
slave 0
11, 15,
19, 24,
28, 39,
43, 47,
51, 57,
61
11, 15,
20, 31,
35, 41,
45
11, 23
29
spi_m_ss_1#
Output
Active low slave select 1 from master to
slave 1
Table 6.13 SPI Master Signal Names
The main purpose of the SPI Master block is to transfer data between an external SPI interface and the
VNC2. It does this under the control of the CPU and DMA engine via the on chip I/O bus.
An SPI master interface transfer can only be initiated by the SPI Master and begins with the slave select
signal being asserted. This is followed by a data byte being clocked out with the master supplying SCLK.
The master always supplies the first byte, which is called a command byte. After this the desired number
of data bytes are transferred before the transaction is terminated by the master de-asserting slave
select.
The SPI Master will transmit on MOSI as well as receive on MISO during every data stage. At the end of
each byte spi_tx_done and spi_rx_full_int are set. Figure 6.21 Typical SPI Master Timing and
Table 6.14 SPI Master Timing show an example of this.
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相关代理商/技术参数 |
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|---|---|
| VNC2-64Q1B-TRAY | 功能描述:USB 接口集成电路 Vinculum-II Dual Host/Dev IC QFN-64 RoHS:否 制造商:Cypress Semiconductor 产品:USB 2.0 数据速率: 接口类型:SPI 工作电源电压:3.15 V to 3.45 V 工作电源电流: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:WLCSP-20 |
| VNC2DEBUGMODULE | 制造商:Future Technology Devices International (FTDI Chip) 功能描述:VNC2 Vinculum Debug Module |
| VNC712B-N50A-5TZ | 制造商:SMC Corporation of America 功能描述:Valve, media, coolant, 2 way |
| VNC-DK4-C1404CM | 制造商:L-com Inc 功能描述:4CH DVR w/4 CMOS CAMERAS no HD |
| VNC-DK4-C1404CM-HD | 制造商:L-com Inc 功能描述:4CH DVR w/4 CMOS CAMS 500GB HD |
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