参数资料
型号: W28V400
英文描述: FLASH
中文描述: 闪光
文件页数: 7/48页
文件大小: 427K
代理商: W28V400
W28V400B/T
Publication Release Date: November 18, 2002
- 7 -
Revision A3
6. PIN DESCRIPTION
SYM.
TYPE
NAME AND FUNCTION
A
1
A0
A17
INPUT
ADDRESS INPUTS
: Addresses are internally latched during a write cycle.
A
1: Byte Select Address. Not used in
×
16 mode.
A0
A10: Row Address. Selects 1 of 2048 word lines.
A11
A14: Column Address. Selects 1 of 16 bit lines.
A15
A17: Main Block Address. (Boot and Parameter block Addresses are A12
A17.)
DQ0
DQ15
INPUT/
OUTPUT
DATA INPUT/OUTPUTS
:
DQ0
DQ7:Inputs data and commands during CUI write cycles; outputs data during memory array,
status register and identifier code read cycles. Data pins float to high-impedance when the chip is
deselected or outputs are disabled. Data is internally latched during a write cycle.
DQ8
DQ15:Inputs data during CUI write cycles in
×
16 mode; outputs data during memory array
read cycles in
×
16 mode; not used for status register and identifier code read mode. Data pins
float to high-impedance when the chip is deselected, outputs are disabled, or in
×
8 mode (#Byte =
V
IL
). Data is internally latched during a write cycle.
#CE
INPUT
CHIP ENABLE
: Activates the device’s control logic, input buffers, decoders and sense amplifiers.
#CE-high deselects the device and reduces power consumption to standby levels.
#RESET
INPUT
RESET/DEEP POWER-DOWN
: Puts the device in deep power-down mode and resets internal
automation. #RESET-high enables normal operation. When driven low, #RESET inhibits write
operations which provides data protection during power transitions. Exit from deep power-down
sets the device to read array mode. With #RESET = V
HH
, block erase or word/byte write can
operate to all blocks without #WP state. Block erase or word/byte write with V
IH
< #RESET < V
HH
produce spurious results and should not be attempted.
#OE
INPUT
OUTPUT ENABLE
: Gates the device’s outputs during a read cycle.
#WE
INPUT
WRITE ENABLE
: Controls writes to the CUI and array blocks. Addresses and data are latched on
the rising edge of the #WE pulse.
#WP
INPUT
WRITE PROTECT
: When #WP is V
IL
, boot blocks cannot be written or erased. When #WP is V
IH
,
locked boot blocks can not be written or erased. #WP is not affected parameter and main places
device in byte mode (× 8). All data is then input or output on blocks.
#BYTE
INPUT
BYTE ENABLE
: #BYTE V
IL
places the device in byte mode (
×
8), All data is then input or output on
DQ0
7, and DQ8
15 float. #BYTE V
IH
places the device in word mode (
×
16), and turns off the
A-1 input buffer.
RY/#BY
OUTPUT
READY/#BUSY
: Indicates the status of the internal WSM. When low, the WSM is performing an
internal operation (block erase or word/byte write). RY/#BY-high indicates that the WSM is ready
for new commands, block erase is suspended, and word/byte write is inactive, word/byte write is
suspended, or the device is in deep power-down mode. RY/#BY is always active and does not float
when the chip is deselected or data outputs are disabled.
VPP
SUPPLY
BLOCK ERASE AND WORD/BYTE WRITE POWER SUPPLY
: For erasing array blocks or writing
words/bytes. With V
PP
V
PPLK
, memory contents cannot be altered. Block erase and word/byte
write with an invalid V
PP
(see DC Characteristics) produce spurious results and should not be
attempted.
V
DD
SUPPLY
DEVICE POWER SUPPLY
: Internal detection configures the device for 2.7V, 3.3V or 5V operation.
To switch from one voltage to another, ramp V
DD
down to V
SS
and then ramp V
DD
to the new
voltage. Do not float any power pins. With V
DD
VLKO, all write attempts to the flash memory are
inhibited. Device operations at invalid V
DD
voltage (see DC Characteristics) produce spurious
results and should not be attempted.
V
SS
SUPPLY
GROUND
: Do not float any ground pins.
NC
NO CONNECT
: Lead is not internal connected; it may be driven or floated.
Table 1.
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