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参数资料
| 型号： | W332M72V-133BM |
| 厂商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分类： | DRAM |
| 英文描述： | 32M X 72 SYNCHRONOUS DRAM, 5.5 ns, PBGA219 |
| 封装： | 32 X 25 MM, PLASTIC, BGA-219 |
| 文件页数： | 15/15页 |
| 文件大小： | 257K |
| 代理商： | W332M72V-133BM |
9
White Electronic Designs
W332M72V-XBX
March 2006
Rev. 3
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
ABSOLUTE MAXIMUM RATINGS
Parameter
Unit
Voltage on VCC, VCCQ Supply relative to Vss
-1 to 4.6
V
Voltage on NC or I/O pins relative to Vss
-1 to 4.6
V
Operating Temperature TA (Mil)
-55 to +125
°C
Operating Temperature TA (Ind)
-40 to +85
°C
Storage Temperature, Plastic
-55 to +125
°C
NOTE: Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions greater than those indicated in the operational sections of this specication is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CAPACITANCE (NOTE 2)
Parameter
Symbol
Max
Unit
Input Capacitance: CLK
CI1
9
pF
Addresses, BA0-1 Input Capacitance
CA
34
pF
Input Capacitance: All other input-only pins
CI2
12
pF
Input/Output Capacitance: I/Os
CIO
12
pF
BGA THERMAL RESISTANCE
Description
Symbol
Max
Unit
Notes
Junction to Ambient (No Airow)
Theta JA
13.9
C/W
1
Junction to Ball
Theta JB
10.3
C/W
1
Junction to Case (Top)
Theta JC
4.6
C/W
1
NOTE: Refer to Application Note “PBGA Thermal Resistance Correlation” at www.wedc.com in the application notes section for modeling conditions.
The procedure for exiting self refresh requires a sequence
of commands. First, CLK must be stable (stable clock
is dened as a signal cycling within timing constraints
specified for the clock pin) prior to CKE going back
HIGH. Once CKE is HIGH, the SDRAM must have NOP
commands issued (a minimum of two clocks) for tXSR,
because time is required for the completion of any internal
refresh in progress.
Upon exiting the self refresh mode, AUTO REFRESH
commands must be issued as both SELF REFRESH and
AUTO REFRESH utilize the row refresh counter.
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| W332M72V-100BI | 32M X 72 SYNCHRONOUS DRAM, 7 ns, PBGA219 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W332M72V-133SBC | 制造商:Microsemi Corporation 功能描述:32M X 72 SDRAM, 3.3V, 133MHZ, 208 PBGA, COMMERCIAL TEMP. - Bulk |
| W332M72V-133SBI | 制造商:Microsemi Corporation 功能描述:32M X 72 SDRAM, 3.3V, 133MHZ, 208 PBGA, INDUSTRIAL TEMP. - Bulk |
| W332M72V-133SBM | 制造商:Microsemi Corporation 功能描述:32M X 72 SDRAM, 3.3V, 133MHZ, 208 PBGA, MIL-TEMP. - Bulk |
| W332M72V-XBX | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:32Mx72 Synchronous DRAM |
| W332M72V-XSBX | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:32Mx72 Synchronous DRAM |
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