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参数资料
| 型号： | W3E32M64SA-266BI |
| 厂商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分类： | DRAM |
| 英文描述： | 32M X 64 DDR DRAM, 0.75 ns, PBGA219 |
| 封装： | 25 X 25 MM, PLASTIC, BGA-219 |
| 文件页数： | 16/17页 |
| 文件大小： | 701K |
| 代理商： | W3E32M64SA-266BI |
W3E32M64SA-XBX
8
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
December 2007
Rev. 1
COMMAND
READ
NOP
CL = 2.5
DON'T CARE
TRANSITIONING DATA
DQ
DQS
T0
T1
T2
T2n
T3
T3n
COMMAND
READ
NOP
CL = 2
DQ
DQS
CLK
T0
T1
T2
T2n
T3
T3n
Burst Length = 4 in the cases shown
Shown with nominal tAC and nominal tDSDQ
DATA
CLK
FIGURE 4 – CAS LATENCY
FIGURE 5 – EXTENDED MODE
REGISTER DEFINITION
DLL
Enable
Disable
DLL
DS
A9
A7
A6
A5
A4
A3
A8
A2
A1
A0
Extended Mode
Register (Ex)
Address Bus
Operating Mode
A10
A11
11
01
BA0
BA1
E0
0
1
Drive Strength
Normal
Reduced
E1
0
1
Operating Mode
Reserved
E1, E0
Valid
-
E12
0
-
E10
0
-
E9
0
-
E8
0
-
E7
0
-
E6
0
-
E5
0
-
E4
0
-
E3
0
-
A12
E11
0
-
1. E14 and E13 must be "0, 1" to select the Extended Mode Register (vs. the base Mode Register)
2. The QFC function is not supported.
E2
0
-
allowed as long as it does not interrupt the data transfer
in the current bank and does not violate any other timing
parameters. Input A10 determines whether one or all
banks are to be precharged, and in the case where only
one bank is to be precharged, inputs BA0, BA1 select the
bank. Otherwise BA0, BA1 are treated as “Don’t Care.”
Once a bank has been precharged, it is in the idle state and
must be activated prior to any READ or WRITE commands
being issued to that bank. A PRECHARGE command will
be treated as a NOP if there is no open row in that bank
(idle state), or if the previously open row is already in the
process of precharging.
AUTO PRECHARGE
AUTO PRECHARGE is a feature which performs the
same individual-bank PRECHARGE function described
above, but without requiring an explicit command. This is
accomplished by using A10 to enable AUTO PRECHARGE
in conjunction with a specic READ or WRITE command.
A precharge of the bank/row that is addressed with the
READ or WRITE command is automatically performed
upon completion of the READ or WRITE burst. AUTO
PRECHARGE is non persistent in that it is either enabled
or disabled for each individual READ or WRITE command.
The device supports concurrent auto precharge if the
command to the other bank does not interrupt the data
transfer to the current bank.
AUTO PRECHARGE ensures that the precharge is
initiated at the earliest valid stage within a burst. This
“earliest valid stage” is determined as if an explicit
precharge command was issued at the earliest possible
time, without violating tRAS (MIN).The user must not issue
another command to the same bank until the precharge
time (tRP) is completed.
BURST TERMINATE
The BURST TERMINATE command is used to truncate
READ bursts (with auto precharge disabled). The most
recently registered READ command prior to the BURST
TERMINATE command will be truncated. The open page
which the READ burst was terminated from remains
open.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W3E32M64SA-266BM | 制造商:Microsemi Corporation 功能描述:32M X 64 DDR, 2.5V, 266 MHZ, 219 PBGA, MIL-TEMP. - Bulk |
| W3E32M64SA-333BC | 制造商:Microsemi Corporation 功能描述:32M X 64 DDR, 2.5V, 333 MHZ, 219 PBGA, COMMERCIAL TEMP. - Bulk |
| W3E32M64SA-333BI | 制造商:White Electronic Designs 功能描述:FOUR-PORT, MIXED SIGNAL, HIGH-VOLTAGE HIGH POWER OVER ET 制造商:Microsemi Corporation 功能描述:32M X 64 DDR, 2.5V, 333 MHZ, 219 PBGA, INDUSTRIAL TEMP. - Bulk 制造商:Microsemi Corporation 功能描述:SDRAM MEMORY |
| W3E32M64SA-333BM | 制造商:Microsemi Corporation 功能描述:32M X 64 DDR, 2.5V, 333 MHZ, 219 PBGA, MIL-TEMP. - Bulk |
| W3E32M64S-XBX | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:32Mx64 DDR SDRAM |
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