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参数资料
| 型号： | W49F002U70BN |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | PROM |
| 英文描述： | 256K X 8 FLASH 5V PROM, 70 ns, PDIP32 |
| 封装： | PLASTIC, DIP-32 |
| 文件页数： | 26/30页 |
| 文件大小： | 0K |
| 代理商： | W49F002U70BN |
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W49F002U
Publication Release Date: April 19, 2005
- 5 -
Revision A7
6. FUNCTIONAL DESCRIPTION
6.1 Device Operation
6.1.1 Read Mode
The read operation of the W49F002U is controlled by #CE and #OE, both of which have to be low for
the host to obtain data from the outputs. #CE is used for device selection. When #CE is high, the chip is
de-selected and only standby power will be consumed. #OE is the output control and is used to gate
data from the output pins. The data bus is in high impedance state when either #CE or #OE is high.
Refer to the timing waveforms for details.
6.1.2 Write Mode
Device erase and program are accomplished via the command register. The content of the register
serves as inputs to the internal state machine. The state machine outputs dictate the function of the
device.
The command register itself does not occupy any addressable memory location. The register is a latch
used to store the commands, along with the address and data information needed to execute the
command. The command register is written to bring #WE to logic low state when #CE is at logic low
state and #OE is at logic high state. Addresses are latched on the falling edge of #WE or #CE,
whichever happens later; while data is latched on the rising edge of #WE or #CE, whichever happens
first. Standard microprocessor write timings are used.
Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing
parameters.
6.1.3 Standby Mode
There are two ways to implement the standby mode on the W49F002U device, both using the #CE pin.
A CMOS standby mode is achieved with the
#CE input held at VDD -0.3V. Under this condition the current is
typically reduced to less than 100
A. A TTL standby mode is achieved with the #CE pin held at VIH.
Under this condition the current is typically reduced to less than 3 mA.
In the standby mode the outputs are in the high impedance state, independent of the #OE input.
6.1.4 Output Disable Mode
With the #OE input at a logic high level (VIH), output from the device is disabled. This will cause the
output pins to be in a high impedance state.
6.1.5 Auto-select Mode
The auto-select mode allows the reading of a binary code from the device and will identify its
manufacturer and type. This mode is intended to be used by programming equipment for the purpose
of automatically matching the device to be programmed with its corresponding programming algorithm.
This mode is functional over the entire temperature range of the device.
To activate this mode, the programming equipment must force VID (11.5V to 12.5V) on address pin A9.
Two identifier bytes may then be sequenced from the device outputs by toggling address A0 from VIL to
VIH. All addresses are don
′t cares except A0 and A1 (see "Auto-select Codes"). Note: The hardware
SID read function is not included in all parts; please refer to Ordering Information for details.
The manufacturer and device codes may also be read via the command register; i.e., the W49F002U is
erased or programmed in a system without access to high voltage on the A9 pin. The command
sequence is illustrated in "Auto-select Codes".
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相关代理商/技术参数 |
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|---|---|
| W49F002U-90B | 制造商:WINBOND 制造商全称:Winbond 功能描述:256K X 8 CMOS FLASH MEMORY |
| W49F002UP12B | 制造商:WINBOND 制造商全称:Winbond 功能描述:256K X 8 CMOS FLASH MEMORY |
| W49F002UP70B | 制造商:WINBOND 制造商全称:Winbond 功能描述:256K X 8 CMOS FLASH MEMORY |
| W49F002UP90B | 制造商:WINBOND 制造商全称:Winbond 功能描述:256K X 8 CMOS FLASH MEMORY |
| W49F002UT12B | 制造商:WINBOND 制造商全称:Winbond 功能描述:256K X 8 CMOS FLASH MEMORY |
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