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参数资料
| 型号： | W6694ACD |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | 数字传输电路 |
| 英文描述： | DATACOM, ISDN CONTROLLER, PQFP48 |
| 封装： | 7 X 7 MM, 1.40 MM HEIGHT, LQFP-48 |
| 文件页数： | 5/42页 |
| 文件大小： | 567K |
| 代理商： | W6694ACD |
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Preliminary Data Sheet
W6694A USB-ISDN S/T-Controller
-13-
Publication Release Date: May, 2001
Revision 1.03
7. FUNCTIONAL DESCRIPTIONS
7.1 Microcontroller
The embedded 8 bit microcontroller core is a standard 80C51 MCU, operate at 24 MHz clock frequency. Its main function is
to transparently transfer data between USB, and ISDN/GCI/PCM interface. Data in D/B1/B2 channel is transferred as it is,
without further HDLC framing processing. All interface accept D/B1/B2 channel data, except for PCM interface, which
accept only B channel data. The data from each interface is first stored at individual register in the SFR (Special Function
Register) of microcontroller. Then the firmware, which resides in internal Mask ROM, is executed to constantly move data
between registers for different interface. The B channel receiving registers can be programmed by way of USB interface to
dynamically assign the data path between interfaces.
7.1.1 Special function register (SFR)
The SFRs, as in standard 80C51 architecture, reside in the upper 128 bytes of internal RAM, from address 80H to FFH.
W6694A specifically assign registers among SFRs exclusively for use of internal data transfer between interfaces. SFRs are
accessed by internal firmware only, and cannot be directly accessed by Bulk-OUT commands of USB interface. However,
some of the Bulk-OUT commands are used by host software to control FIFOs, such as CMDR1 and CMDR2.
TAble 7.1 W6694A specified SFR
SFR Addr.
Symbol
Meaning
Access
Bit Addressable
C0
INTFS
Interface Status
R
Yes
C1
L1DDR
Layer 1 D Channel Data Read
R
No
C2
L1DDW
Layer 1 D Channel Data Write
W
No
C3
CB1DR
Common B 1 Channel Data Read
R
No
C4
CB1DW
Common B 1 Channel Data Write
W
No
C5
CB2DR
Common B 2 Channel Data Read
R
No
C6
CB2DW
Common B 2 Channel Data Write
W
No
C9
USBDDR
USB D Channel Data Read
R
No
CA
USBDDW
USB D Channel Data Write
W
No
CB
USBB1DR
USB B 1 Channel Data Read
R
No
CC
USBB1DW
USB B 1 Channel Data Write
W
No
CD
USBB2DR
USB B 2 Channel Data Read
R
No
CE
USBB2DW
USB B 2 Channel Data Write
W
No
The reset values of above registers are all 0.
7.1.1.1 Interface Status Register
INTFS
Read_clear
Address C0h
Values after reset: 00h
7
6
5
4
3
2
1
0
L1DRR
L1DWR
CB1RR
CB1WR
CB2RR
CB2WR
UDRR
UDWR
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相关代理商/技术参数 |
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