参数资料
型号: W942516CH-75
厂商: WINBOND ELECTRONICS CORP
元件分类: DRAM
英文描述: 16M X 16 DDR DRAM, 0.75 ns, PDSO66
封装: 0.400 X 0.875 INCH, 0.65 MM PITCH, TSOP2-66
文件页数: 6/47页
文件大小: 2809K
代理商: W942516CH-75
W942516CH
- 14 -
(10) Transition times are measured between VIH min(AC) and VIL max(AC).Transition (rise and fall) of input signals have a fixed
slope.
(11) IF the result of nominal calculation with regard to tCK contains more than one decimal place, the result is rounded up to
the nearest decimal place.
(i.e., TDQSS = 0.75
× tCK, tCK = 7.5 nS, 0.75 × 7.5 nS = 5.625 nS is rounded up to 5.6 nS.)
(12) VX is the differential clock cross point voltage where input timing measurement is referenced.
(13) VID is magnitude of the difference between CLK input level and CLK input level.
(14) VISO means {VICK(CLK)+V
( CLK )}/2.
ICK
(15) Refer to the figure below.
CLK
VSS
VICK
VX
VICK
VID(AC)
0 V Differential
VISO
VISO(min)
VISO(max)
VSS
(16) tAC and tDQSCK depend on the clock jitter. These timing are measured at stable clock.
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