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参数资料
| 型号： | W949D2CBJX5I |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | 16M X 32 DDR DRAM, 5 ns, PBGA90 |
| 封装： | 8 X 13 MM, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, VFBGA-90 |
| 文件页数： | 22/60页 |
| 文件大小： | 1160K |
| 代理商： | W949D2CBJX5I |
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W949D6CB / W949D2CB
512Mb Mobile LPDDR
Publication Release Date: Jun, 14, 2011
- 29 -
Revision A01-006
During Read bursts, DQS is driven by the LPDDR SDRAM along with the output data. The initial Low state of the
DQS is known as the read preamble; the Low state coincident with last data-out element is known as the read post-
amble. The first data-out element is edge aligned with the first rising edge of DQS and the successive data-out
elements are edge aligned to successive edges of DQS. This is shown in following figure with a CAS latency of 2
and 3.
Upon completion of a read burst, assuming no other READ command has been initiated, the DQs will go to High-Z.
7.5.3 Read Burst Showing CAS Latency
CL=2
DO n
= Don't Care
BA Col n
READ
NOP
CK
Command
Address
DQS
DQ
DQS
DQ
1)DO n=Data Out from column n
2)BA,Col n =Bank A,Column n
3)Burst Length=4;3 subsequent elements of Data Out appear inthe programmed order following DO n
4)Shown with nominal tAC, tDQSCK and tDQSQ
CL=3
7.5.4 Read to Read
Data from a read burst may be concatenated or truncated by a subsequent READ command. The first data from the
new burst follows either the last element of a completed burst or the last desired element of a longer burst that is
being truncated. The new READ command should be issued X cycles after the first READ command, where X
equals the number of desired data-out element pairs (pairs are required by the 2n-prefetch architecture). This is
shown in following figure.
相关PDF资料 |
PDF描述 |
|---|---|
| W949D6CBHX6E | 32M X 16 DDR DRAM, 5 ns, PBGA60 |
| W949D2CBJX6G | 16M X 32 DDR DRAM, 5 ns, PBGA90 |
| W963B6BBN80E | 512K X 16 PSEUDO STATIC RAM, 75 ns, PBGA48 |
| W964A6BBN70E | 1M X 16 PSEUDO STATIC RAM, 65 ns, PBGA48 |
| W964L6ABN70E | 1M X 16 PSEUDO STATIC RAM, 65 ns, PBGA48 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| W949D2CBJX5I TR | 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 200MHZ, INDUST |
| W949D2CBJX6E | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip Mobile LPDDR SDRAM 512M-Bit 16Mx32 1.8V 90-Pin VFBGA |
| W949D2CBJX6ETR | 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 166MHZ, 65NM |
| W949D2CBJX6G | 制造商:WINBOND 制造商全称:Winbond 功能描述:512Mb Mobile LPDDR |
| W949D2KBJX5E | 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 200MHZ 制造商:Winbond Electronics Corp 功能描述:IC MEMORY |
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