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参数资料
| 型号： | WE128K32P-125H1I |
| 厂商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分类： | PROM |
| 英文描述： | 128K X 32 EEPROM 5V MODULE, 125 ns, CPGA66 |
| 封装： | 1.075 X 1.075 INCH, HERMETIC SEALED, CERAMIC, HIP-66 |
| 文件页数： | 12/14页 |
| 文件大小： | 496K |
| 代理商： | WE128K32P-125H1I |
7
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WE128K32-XXX
March 2008
Rev. 12
White Electronic Designs Corp. reserves the right to change products or specications without notice.
DATA POLLING
The WE128K32-XXX offers a data polling feature which
allows a faster method of writing to the device. Figure 8
shows the timing diagram for this function. During a byte
or page write cycle, an attempted read of the last byte
written will result in the complement of the written data
on D7 (for each chip.) Once the write cycle has been
completed, true data is valid on all outputs and the next
cycle may begin. Data polling may begin at any time during
the write cycle.
FIGURE 8 – DATA POLLING WAVEFORMS
DATA POLLING CHARACTERISTICS
(VCC = 5.0V, VSS = 0V, TA = -55°C to +125°C)
Parameter
Symbol
Min
Max
Unit
Data Hold Time
tDH
10
ns
OE# Hold Time
tOEH
10
ns
OE# To Output Valid
tOE
55
ns
Write Recovery Time
tWR
0
ns
WE1-4
#
tOEH
tDH
tOE
tWR
HIGH Z
CS1-4
#
OE
#
I/O7
ADDRESS
TOGGLE BIT: In addition to DATA# Polling another method for determining the end of
a write cycle is provided. During the write operation, successive attempts to read data
from the device will result in I/O6 toggling between one and zero. Once the write has
completed, I/O6 will stop toggling and valid data will be read. Reading the toggle bit may
begin at any time during the write cycle.
NOTE:
1. Toggling either OE# or CS# or both OE# and CS# will operate toggle bit.
2. Beginning and ending state of I/O6 will vary
3. Any address location may be used but the address should not vary.
TOGGLE BUT CHARACTERISTICS(1)
Symbol
Parameter
Min
Max
Units
tDH
Data Hold Time
10
ns
tOEH
OE# Hold Time
10
ns
tOE
OE# to Output Delay
ns
tOEHP
OE# High Pulse
150
ns
tWR
Write Recovery Time
0
ns
tWR
HIGH Z
tDH
tOE
tOEH
WE#
CS#
OE#
I/O6 (2)
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