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The Mobile AMD Athlon XP-M Processor
March 2003
In addition to its superscalar design, the mobile AMD Athlon XP-M processor’s
FPU is super pipelined. This technique supports higher clock frequencies and enables
the FPU to process complex floating-point instructions more quickly and deliver
high overall floating-point instruction throughput. In comparison, the FPU of the
Pentium 4 processor only offers two execution units, one for Fadd and Fmul and one
for Fstore. Thus, for example, the mobile AMD Athlon XP-M processor can do one
floating point addition AND one multiplication per clock cycle, while the Pentium 4
processor can only do one multiplication OR one addition per clock cycle. The
seventh-generation FPU of the mobile AMD Athlon XP-M processor incorporates
additional features such as a 36-entry instruction scheduler and an 88-entry register
file for independent, superscalar, out-of-order, speculative execution of floating-point
instructions. With three separate execution units, the mobile AMD Athlon XP-M
processor’s superscalar FPU can boost the performance of floating point-intensive
applications varying from commercial applications such as 3D modeling to consumer
applications such as high-end gaming for mobile systems.
3DNow! Professional Technology: FPU Innovation of the
Mobile AMD Athlon XP-M Processor Core
The mobile AMD Athlon XP-M processor with 3DNow! Professional technology
adds 51 new instructions to the enhanced 3DNow! technology supported by the
original AMD Athlon processor family. These 51 new instructions, along with the
SIMD integer additions already included in enhanced 3DNow! technology, are
compatible with Intel’s SSE technology. Table 1 provides a breakout of the 3DNow!
technology instruction set evolution
.