- 您现在的位置：买卖IC网 > PDF目录68583 > WJLXT972ALC.A4SE000 (CORTINA SYSTEMS INC) DATACOM, ETHERNET TRANSCEIVER, PQFP64 PDF资料下载
参数资料
| 型号： | WJLXT972ALC.A4SE000 |
| 厂商： | CORTINA SYSTEMS INC |
| 元件分类： | 网络接口 |
| 英文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| 封装： | LEAD FREE, LQFP-64 |
| 文件页数： | 66/100页 |
| 文件大小： | 1046K |
| 代理商： | WJLXT972ALC.A4SE000 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页当前第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页
LXT972A 3.3 V Dual-Speed Fast Ethernet Transceiver
68
Datasheet
Document #: 249186
Revision #: 003
Rev. Date: August 7, 2002
Table 50. Interrupt Enable Register (Address 18)
Bit
Name
Description
Type 1
Default
18.15:9
Reserved
Write as 0; ignore on read.
R/W
N/A
18.8
Reserved
Write as 0; ignore on read.
R/W
0
18.7
ANMSK
Mask for Auto Negotiate Complete
1 = Enable event to cause interrupt.
0 = Do not allow event to cause interrupt.
R/W
0
18.6
SPEEDMSK
Mask for Speed Interrupt
1 = Enable event to cause interrupt.
0 = Do not allow event to cause interrupt.
R/W
0
18.5
DUPLEXMSK
Mask for Duplex Interrupt
1 = Enable event to cause interrupt.
0 = Do not allow event to cause interrupt.
R/W
0
18.4
LINKMSK
Mask for Link Status Interrupt
1 = Enable event to cause interrupt.
0 = Do not allow event to cause interrupt.
R/W
0
18.3
Reserved
Write as 0, ignore on read.
R/W
0
18.2
Reserved
Write as 0, ignore on read.
R/W
0
18.1
INTEN
1 = Enable interrupts.
0 = Disable interrupts.
R/W
0
18.0
TINT
1 = Force interrupt on MDINT.
0 = Normal operation.
R/W
0
1. R/W = Read /Write
Table 51. Interrupt Status Register (Address 19, Hex 13)
Bit
Name
Description
Type 1
Default
19.15:9
Reserved
Ignore
RO
N/A
19.8
Reserved
Ignore
RO
0
19.7
ANDONE
Auto Negotiation Status
1 = Auto Negotiation has completed.
0 = Auto Negotiation has not completed.
RO/SC
N/A
19.6
SPEEDCHG
Speed Change Status
1 = A Speed Change has occurred since last reading this
register.
0 = A Speed Change has not occurred since last reading this
register.
RO/SC
0
19.5
DUPLEXCHG
Duplex Change Status
1 = A Duplex Change has occurred since last reading this
register.
0 = A Duplex Change has not occurred since last reading this
register.
RO/SC
0
1. R/W = Read/Write, SC = Self Clearing.
相关PDF资料 |
PDF描述 |
|---|---|
| WJLXT972ALC.A4SE001 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| WJLXT972ALC.A4 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| WJLXT972ALC.A4 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| WJLXT972MLC.A4-864101 | DATACOM, ETHERNET TRANSCEIVER, PQFP48 |
| WJLXT972MLC.A4-864115 | DATACOM, ETHERNET TRANSCEIVER, PQFP48 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| WJLXT972MLC.A4 | 功能描述:IC TRANS 3.3V ETHERNET 48-LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:25 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:4.5 V ~ 5.5 V 安装类型:通孔 封装/外壳:16-DIP（0.300"，7.62mm） 供应商设备封装:16-PDIP 包装:管件 |
| WJLXT972MLC.A4 S L7U9 | 制造商:Intel 功能描述:PHY 1-CH 10Mbps/100Mbps 64-Pin LQFP |
| WJLXT972MLC.A4-864115 | 功能描述:TXRX ETH 10/100 SGL PORT 48-LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 类型:收发器 驱动器/接收器数:1/1 规程:RS422，RS485 电源电压:4.75 V ~ 5.25 V 安装类型:通孔 封装/外壳:8-DIP（0.300"，7.62mm） 供应商设备封装:8-PDIP 包装:管件 产品目录页面:1402 (CN2011-ZH PDF) |
| WJLXT972MLCA4 | 制造商:Cortina Systems Inc 功能描述: |
| WJM1000 | 功能描述:射频模块 902-928 MHz US ISM EPC Class 1 Gen 2 RoHS:否 制造商:Linx Technologies 产品:Transceiver Modules 频带:902 MHz to 928 MHz 输出功率:- 15.5 dBm to + 12.5 dBm 接口类型:UART 工作电源电压:- 0.3 VDC to + 5.5 VDC 传输供电电流:38.1 mA 接收供电电流:22.7 mA 天线连接器类型:U.FL 最大工作温度:+ 85 C 尺寸:1.15 mm x 0.63 mm x 0.131 mm |
发布紧急采购，3分钟左右您将得到回复。