参数资料
型号: WJLXT972ALC.A4SE001
厂商: CORTINA SYSTEMS INC
元件分类: 网络接口
英文描述: DATACOM, ETHERNET TRANSCEIVER, PQFP64
封装: LEAD FREE, LQFP-64
文件页数: 16/100页
文件大小: 1046K
代理商: WJLXT972ALC.A4SE001
LXT972A 3.3 V Dual-Speed Fast Ethernet Transceiver
22
Datasheet
Document #: 249186
Revision #: 003
Rev. Date: August 7, 2002
3.4
Initialization
When the LXT972A is first powered on, reset, or encounters a link failure state, it checks the
MDIO register configuration bits to determine the line speed and operating conditions to use for
the network link. The configuration bits may be set by the Hardware Control or MDIO interface as
shown in Figure 6.
3.4.1
MDIO Control Mode
In the MDIO Control mode, the LXT972A reads the Hardware Control Interface pins to set the
initial (default) values of the MDIO registers. Once the initial values are set, bit control reverts to
the MDIO interface.
3.4.2
Hardware Control Mode
In the Hardware Control Mode, LXT972A disables direct write operations to the MDIO registers
via the MDIO Interface. On power-up or hardware reset the LXT972A reads the Hardware Control
Interface pins and sets the MDIO registers accordingly.
The following modes are available using either Hardware Control or MDIO Control:
Force network link operation to:
100BASE-TX, Full-Duplex
100BASE-TX, Half-Duplex
10BASE-T, Full-Duplex
10BASE-T, Half-Duplex
Allow auto-negotiation/parallel-detection
When the network link is forced to a specific configuration, the LXT972A immediately begins
operating the network interface as commanded. When auto-negotiation is enabled, the LXT972A
begins the auto-negotiation/parallel-detection operation.
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