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| 型号： | WJLXT972MLC.A4-864101 |
| 厂商： | CORTINA SYSTEMS INC |
| 元件分类： | 网络接口 |
| 英文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP48 |
| 封装： | ROHS COMPLIANT, LQFP-48 |
| 文件页数： | 17/99页 |
| 文件大小： | 1526K |
| 代理商： | WJLXT972MLC.A4-864101 |
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Page 24
Cortina Systems LXT971A Single-Port 10/100 Mbps PHY Transceiver
LXT971A PHY
Datasheet
249414, Revision 5.2
13 September 2007
5.0 Functional Description
5.0
Functional Description
This chapter has the following sections:
Section 5.1, Device Overview, on page 24
Section 5.2, Network Media / Protocol Support, on page 25
Section 5.3, Operating Requirements, on page 29
Section 5.4, Initialization, on page 30
Section 5.5, Establishing Link, on page 34
Section 5.6, MII Operation, on page 36
Section 5.7, 100 Mbps Operation, on page 42
Section 5.8, 10 Mbps Operation, on page 49
Section 5.9, Monitoring Operations, on page 50
5.1
Device Overview
The LXT971A PHY is a single-port Fast Ethernet 10/100 PHY that supports 10 Mbps and
100 Mbps networks. It complies with applicable requirements of IEEE 802.3. It directly
drives either a 100BASE-TX line or a 10BASE-T line.
Note:
The LXT971A PHY also supports 100BASE-FX operation through an LVPECL interface.
5.1.1
Comprehensive Functionality
The LXT971A PHY provides a standard Media Independent Interface (MII) for 10/100
MACs. The LXT971A PHY performs all functions of the Physical Coding Sublayer (PCS)
and Physical Media Attachment (PMA) sublayer as defined in the IEEE 802.3 100BASE-X
standard. It also performs all functions of the Physical Media Dependent (PMD) sublayer
for 100BASE-TX connections.
The LXT971A PHY reads its configuration pins on power-up to check for forced operation
settings.
If the LXT971A PHY is not set for forced operation, it uses auto-negotiation/parallel
detection to automatically determine line operating conditions. If the PHY device on the
other side of the link supports auto-negotiation, the LXT971A PHY auto-negotiates with it
using Fast Link Pulse (FLP) Bursts. If the PHY partner does not support auto-negotiation,
the LXT971A PHY automatically detects the presence of either link pulses (10 Mbps PHY)
or Idle symbols (100 Mbps PHY) and sets its operating conditions accordingly.
The LXT971A PHY provides half-duplex and full-duplex operation at 100 Mbps and
10 Mbps.
5.1.2
Optimal Signal Processing Architecture
The LXT971A PHY incorporates high-efficiency Optimal Signal Processing (OSP) design
techniques, which combine optimal properties of digital and analog signal processing.
The receiver utilizes decision feedback equalization to increase noise and cross-talk
immunity by as much as 3 dB over an ideal all-analog equalizer. Using OSP mixed-signal
processing techniques in the receive equalizer avoids the quantization noise and
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