参数资料
型号: X40035S14I-BT1
厂商: Intersil
文件页数: 14/23页
文件大小: 0K
描述: IC VOLTAGE MONITOR TRPL 14-SOIC
标准包装: 2,500
类型: 多压监控器
监视电压数目: 3
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 可调节/可选择
电压 - 阀值: 1.3V,2.9V,4.6V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 14-SOIC(0.154",3.90mm 宽)
供应商设备封装: 14-SOICN
包装: 带卷 (TR)
X40030, X40031, X40034, X40035
SIGNALS
FROM THE
MASTER
SDA BUS
S
T
A
R
T
SLAVE
ADDRESS
1 0 1 1 0 0
0
BYTE
ADDRESS
1 1 1 1 1 1 1 1
S
T
A
R
T
SLAVE
ADDRESS
1
S
T
O
P
A
A
A
SIGNALS
FROM THE
C
K
C
K
C
K
DATA
SLAVE
FIGURE 11. RANDOM ADDRESS READ SEQUENCE
Read Operation
Random read operation allows the master to access any
memory location in the array. Prior to issuing the Slave
Address Byte with the R/W bit set to one, the master must
first perform a “dummy” write operation. The master issues
the start condition and the Slave Address Byte, receives an
acknowledge, then issues the Word Address Bytes. After
acknowledging receipts of the Word Address Bytes, the
master immediately issues another start condition and the
Slave Address Byte with the R/W bit set to one. This is
followed by an acknowledge from the device and then by the
8-bit word. The master terminates the read operation by not
responding with an acknowledge and then issuing a stop
condition. See Figure 11 for the address, acknowledge, and
Data Protection
The following circuitry has been included to prevent
inadvertent writes:
? The WEL bit must be set to allow write operations.
? The proper clock count and bit sequence is required prior
to the stop bit in order to start a nonvolatile write cycle.
? A three step sequence is required before writing into the
Control Register to change Watchdog Timer or Block Lock
settings.
? The WP pin, when held HIGH, prevents all writes to the
array and all the Register.
SLAVE BYTE
data transfer sequence.
Serial Device Addressing
CONTROL REGISTER
FAULT DETECTION
1
1
0
0
1
1
1
1
0
0
0
0
1
0
R/W
R/W
REGISTER
Slave Address Byte
Following a start condition, the master must output a Slave
WORD ADDRESS
Address Byte. This byte consists of several parts:
? a device type identifier that is always ‘1011’.
CONTROL REGISTER
FAULT DETECTION
REGISTER
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
? 1-bit (AS) that provides the device select bit. AS bit is set to
“0” as factory default.
? next bit is ‘0’.
? last bit of the slave command byte is a R/W bit. The R/W
bit of the Slave Address Byte defines the operation to be
performed. When the R/W bit is a one, then a read
operation is selected. A zero selects a write operation.
Word Address
The word address is either supplied by the master or
obtained from an internal counter. The internal counter is
undefined on a power-up condition.
Operational Notes
The device powers-up in the following state:
? The device is in the low power standby state.
? The WEL bit is set to ‘0’. In this state it is not possible to
write to the device.
? SDA pin is the input mode.
? RESET/RESET Signal is active for t PURST .
14
FIGURE 12. X40030, X40031, X40034, X40035 ADDRESSING
FN8114.2
August 25, 2008
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