参数资料
型号: X40035S14I-BT1
厂商: Intersil
文件页数: 6/23页
文件大小: 0K
描述: IC VOLTAGE MONITOR TRPL 14-SOIC
标准包装: 2,500
类型: 多压监控器
监视电压数目: 3
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 可调节/可选择
电压 - 阀值: 1.3V,2.9V,4.6V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 14-SOIC(0.154",3.90mm 宽)
供应商设备封装: 14-SOICN
包装: 带卷 (TR)
X40030, X40031, X40034, X40035
Pinouts
X40030, X40034
(14 LD SOIC, TSSOP)
TOP VIEW
X40031, X40035
(14 LD SOIC, TSSOP)
TOP VIEW
V2FAIL
V2MON
LOWLINE
NC
MR
RESET
V SS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V CC
WDO
V3FAIL
V3MON
WP
SCL
SDA
V2FAIL
V2MON
LOWLINE
NC
MR
RESET
V SS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V CC
WDO
V3FAIL
V3MON
WP
SCL
SDA
Pin Descriptions
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
NAME
V2FAIL
V2MON
LOWLINE
NC
MR
RESET/
RESET
V SS
SDA
SCL
WP
V3MON
V3FAIL
WDO
V CC
FUNCTION
V2 Voltage Fail Output. This open drain output goes LOW when V2MON is less than V TRIP2 and goes HIGH when
V2MON exceeds V TRIP2 . There is no power-up reset delay circuitry on this pin.
V2 Voltage Monitor Input. When the V2MON input is less than the V TRIP2 voltage, V2FAIL goes LOW. This input can
monitor an unregulated power supply with an external resistor divider or can monitor a second power supply with no external
components. Connect V2MON to V SS or V CC when not used. The V2MON comparator is supplied by V2MON (X40030,
X40031) or by the V CC input (X40034, X40035).
Early Low V CC Detect. This CMOS output signal goes LOW when V CC < V TRIP1 and goes high when V CC > V TRIP1 .
No connect.
Manual Reset Input. Pulling the MR pin LOW initiates a system reset. The RESET/RESET pin will remain HIGH/LOW
until the pin is released and for the t PURST thereafter.
RESET Output. (X40030, X40034) This pin is an active HIGH CMOS output which goes HIGH whenever V CC falls below
V TRIP1 voltage or if manual reset is asserted. This output stays active for the programmed time period (t PURST ) on power-up. It
will also stay active until manual reset is released and for t PURST thereafter.
RESET Output. (X40031, X40035) This open drain pin is an active LOW output ,which goes LOW whenever V CC falls
below V TRIP1 voltage or if manual reset is asserted. This output stays active for the programmed time period (t PURST ) on
power-up. It will also stay active until manual reset is released and for t PURST thereafter.
Ground
Serial Data. SDA is a bidirectional pin used to transfer data into and out of the device. It has an open drain output and
may be wire ORed with other open drain or open collector outputs. This pin requires a pull-up resistor and the input buffer
is always active (not gated).
Watchdog Input. A HIGH to LOW transition on the SDA (while SCL is toggled from HIGH to LOW and followed by a stop
condition) restarts the Watchdog timer. The absence of this transition within the watchdog time out period results in WDO
going active.
Serial Clock. The Serial Clock controls the serial bus timing for data input and output.
Write Protect. WP HIGH prevents writes to any location in the device (including all the registers). It has an internal
pull-down resistor (>10M Ω typical).
V3 Voltage Monitor Input. When the V3MON input is less than the V TRIP3 voltage, V3FAIL goes LOW. This input can
monitor an unregulated power supply with an external resistor divider or can monitor a third power supply with no external
components. Connect V3MON to V SS or V CC when not used. The V3MON comparator is supplied by the V3MON input.
V3 Voltage Fail Output. This open drain output goes LOW when V3MON is less than V TRIP3 and goes HIGH when
V3MON exceeds V TRIP3 . There is no power-up reset delay circuitry on this pin.
WDO Output. WDO is an active LOW, open drain output, which goes active whenever the watchdog timer goes active.
Supply Voltage .
6
FN8114.2
August 25, 2008
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