参数资料
型号: X4005S8I-4.5A
厂商: Intersil
文件页数: 15/16页
文件大小: 0K
描述: IC SUPERVISOR CPU I2C 8-SOIC
标准包装: 100
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 高有效
复位超时: 最小为 100 ms
电压 - 阀值: 4.62V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
X4003, X4005
Mini Small Outline Plastic Packages (MSOP)
N
M8.118 (JEDEC MO-187AA)
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
E1
E
SYMBOL
INCHES
MIN MAX
MILLIMETERS
MIN MAX
NOTES
INDEX
AREA
1 2
-B-
0.20 (0.008)
A B C
A
A1
0.037
0.002
0.043
0.006
0.94
0.05
1.10
0.15
-
-
TOP VIEW
A2
0.030
0.037
0.75
0.95
-
GAUGE
PLANE
0.25
(0.010)
4X θ
R1
R
b
c
D
0.010
0.004
0.116
0.014
0.008
0.120
0.25
0.09
2.95
0.36
0.20
3.05
9
-
3
A
A2
SEATING
PLANE -C-
4X θ
L1
L
E1
e
E
0.116 0.120
0.026 BSC
0.187 0.199
2.95 3.05
0.65 BSC
4.75 5.05
4
-
-
L
0.016
0.028
0.40
0.70
6
A1
-H-
e
D
b
0.10 (0.004)
-A-
0.20 (0.008)
C
C
SEATING
PLANE
C
L1
N
R
R1
0.037 REF
8
0.003 -
0.003
-
0.95 REF
8
0.07
0.07
-
-
-
7
-
-
SIDE VIEW
a
0
5 o
15 o
5 o
15 o
-
0.20 (0.008)
C D
CL
E 1
END VIEW
-B-
α
0 o
6 o
0 o
6 o
-
Rev. 2 01/03
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-187BA.
2. Dimensioning and tolerancing per ANSI Y14.5M - 1994.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs and are measured at Datum Plane. Mold flash, protrusion
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions
and are measured at Datum Plane. - H - Interlead flash and
protrusions shall not exceed 0.15mm (0.006 inch) per side.
5. Formed leads shall be planar with respect to one another within
0.10mm (0.004) at seating Plane.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Datums -A -
and -B- to be determined at Datum plane
-H- .
11. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
15
FN8113.2
June 30, 2008
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