参数资料
| 型号： | X40421V14I-CT1 |
| 厂商： | Intersil |
| 文件页数： | 4/25页 |
| 文件大小： | 0K |
| 描述： | IC VOLT MON DUAL SUP/SW 14-TSSOP |
| 标准包装： | 2,500 |
| 类型： | 多压监控器 |
| 监视电压数目： | 2 |
| 输出： | 开路漏极或开路集电极 |
| 复位： | 低有效 |
| 复位超时： | 可调节/可选择 |
| 电压 - 阀值： | 1.6V，2.9V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 14-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 14-TSSOP |
| 包装： | 带卷 (TR) |
X40420, X40421
PIN DESCRIPTION (Continued)
Pin
6
7
8
9
10
11
12
13
14
Name
RESET/
RESET
V SS
SDA
SCL
WP
V BATT
V OUT
BATT-ON
V CC
Function
RESET Output. (X40421) This open drain pin is an active LOW output which goes LOW whenever
V CC falls below V TRIP1 voltage or if manual reset is asserted. This output stays active for the pro-
grammed time period (t PURST ) on power-up. It will also stay active until manual reset is released and
for t PURST thereafter.
RESET Output. (X40420) This pin is an active HIGH open drain output which goes HIGH whenever
V CC falls below V TRIP1 voltage or if manual reset is asserted. This output stays active for the pro-
grammed time period (t PURST ) on power-up. It will also stay active until manual reset is released and
for t PURST thereafter.
Ground
Serial Data. SDA is a bidirectional pin used to transfer data into and out of the device. It has an open
drain output and may be wire ORed with other open drain or open collector outputs. This pin requires
a pull up resistor and the input buffer is always active (not gated).
Watchdog Input. A HIGH to LOW transition on the SDA (while SCL is toggled from HIGH to LOW
and followed by a stop condition) restarts the Watchdog timer. The absence of this transition within
the watchdog time out period results in WDO going active.
Serial Clock. The Serial Clock controls the serial bus timing for data input and output.
Write Protect. WP HIGH prevents writes to any location in the device (including all the registers). It
has an internal pull down resistor. (>10M ? typical)
Battery Supply Voltage. This input provides a backup supply in the event of a failure of the
primary V CC voltage. The V BATT voltage typically provides the supply voltage necessary to
maintain the contents of SRAM and also powers the internal logic to “stay awake.” If the battery is not
used, connect V BATT to ground.
Output Voltage. (V)
V OUT = V CC if V CC > V TRIP1 .
IF V CC < V TRIP1
then V OUT = V CC if V CC > V BATT + 0.03V
else V OUT = V BATT (ie if V CC < V BATT - 0.03V)
Note: There is hysteresis around V BATT ± 0.03V point to avoid oscillation at or near the
switchover voltage. A capacitance of 0.1μF must be connected to V OUT to ensure stability.
Battery On. This CMOS output goes HIGH when the V OUT switches to V BATT and goes LOW when
V OUT switches to V CC . It is used to drive an external PNP pass transistor when V CC = V OUT and current
requirements are greater than 50mA.
The purpose of this output is to drive an external transistor to get higher operating currents when the
V CC supply is fully functional. In the event of a V CC failure, the battery voltage is applied to the V OUT
pin and the external transistor is turned off. In this “backup condition,” the battery only needs to supply
enough voltage and current to keep SRAM devices from losing their data–there is no communication
at this time.
Supply Voltage
4
May 25, 2006
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| X40426V14I-2.7AT1 | 功能描述:IC SUPERVISR CPU IIC LVS 14TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 标准包装:100 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:- 复位:低有效 复位超时:最小为 100 ms 电压 - 阀值:4.38V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:8-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:8-TSSOP 包装:管件 |
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