参数资料
| 型号： | X4325V8I-4.5A |
| 厂商： | Intersil |
| 文件页数： | 7/22页 |
| 文件大小： | 0K |
| 描述： | IC SUPERVISOR CPU 32K EE 8-TSSOP |
| 标准包装： | 200 |
| 类型： | 简单复位/加电复位 |
| 监视电压数目： | 1 |
| 复位： | 高有效 |
| 复位超时： | 最小为 100 ms |
| 电压 - 阀值： | 4.62V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 8-TSSOP |
| 包装： | 管件 |
X4323, X4325
Figure 4. V TRIP Programming Sequence
V TRIP Programming
Execute
Reset V TRIP
Sequence
Set V CC = V CC Applied =
Desired V TRIP
New V CC Applied =
Old V CC Applied + Error
NO
Execute
Set V TRIP
Sequence
Apply 5V to V CC
Decrement V CC
(V CC = V CC - 50mV)
RESET pin
goes active?
YES
New V CC Applied =
Old V CC Applied - Error
Execute
Reset V TRIP
Sequence
Error ≤ –Emax
Measured V TRIP -
Desired V TRIP
Error ≥ Emax
–Emax < Error < Emax
Emax = Maximum Allowed V TRIP Error
Control Register
The Control Register provides the user a mechanism
for changing the Block Lock and Watchdog Timer set-
tings. The Block Lock and Watchdog Timer bits are
nonvolatile and do not change when power is
removed.
The Control Register is accessed at address FFFFh. It
can only be modified by performing a byte write opera-
tion directly to the address of the register and only one
data byte is allowed for each register write operation.
Prior to writing to the Control Register, the WEL and
RWEL bits must be set using a two step process, with
the whole sequence requiring 3 steps. See "Writing to
the Control Register" on page 9.
7
DONE
The user must issue a stop after sending this byte to
the register to initiate the nonvolatile cycle that stores
WD1, and WD0. The X4323, X4325 will not acknowl-
edge any data bytes written after the first byte is
entered.
FN8122.1
May 25, 2006
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