参数资料
型号: X96010V14IZ
厂商: Intersil
文件页数: 5/26页
文件大小: 0K
描述: IC SENSOR CONDITIONER 14-TSSOP
标准包装: 95
类型: 传感器调节器
输入类型: 电压
输出类型: 电压
接口: 2 线
电流 - 电源: 15mA
安装类型: 表面贴装
封装/外壳: 14-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 14-TSSOP
包装: 管件
产品目录页面: 1246 (CN2011-ZH PDF)
13
FN8214.1
October 25, 2005
L2DAS: LUT2 DIRECT ACCESS SELECT BIT (NON-
VOLATILE
)
When bit L2DAS is set to “0” (default), LUT2 is
addressed by the output of the on-chip A/D converter.
When bit L2DAS is set to “1”, LUT2 is addressed by
bits L2DA5 - L2DA0.
D2DAS: D/A 2 DIRECT ACCESS SELECT BIT (NON-
VOLATILE
)
When bit D2DAS is set to “0” (default), the input to the
D/A converter 2 is a row of LUT2. When bit D2DAS is set
to “1”, that input is the content of the Control register 4.
Control Register 6
This register is accessed by performing a Read or
Write operation to address 86h of memory.
WEL: WRITE ENABLE LATCH (VOLATILE)
The WEL bit controls the Write Enable status of the
entire X96010 device. This bit must be set to “1” before
any other Write operation (volatile or nonvolatile). Oth-
erwise, any proceeding Write operation to memory is
aborted and no ACK is issued after a Data Byte.
The WEL bit is a volatile latch that powers up in the “0”
state (disabled). The WEL bit is enabled by writing
100000002 to Control register 6. Once enabled, the
WEL bit remains set to “1” until the X96010 is powered
down, and then up again, or until it is reset to “0” by
writing 000000002 to Control register 6.
A Write operation that modifies the value of the WEL bit
will not cause a change in other bits of Control register 6.
Status Register - ADC Output
This register is accessed by performing a Read opera-
tion to address 87h of memory.
AD7 - AD0: A/D CONVERTER OUTPUT BITS (READ
ONLY
)
These eight bits are the binary output of the on-chip
A/D converter. The output is 000000002 for minimum
input and 111111112 for full scale input. The six
MSBs select a row of the LUTs.
X96010
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