参数资料
型号: XC3190A-3PC84C
厂商: Xilinx Inc
文件页数: 6/76页
文件大小: 0K
描述: IC LOGIC CL ARRAY 9000GAT 84PLCC
产品变化通告: XC4000XL/E, XC9500XV, XC3100A Discontinuance 12/Apr/2010
标准包装: 1
系列: XC3000A/L
LAB/CLB数: 320
RAM 位总计: 64160
输入/输出数: 70
门数: 6000
电源电压: 4.25 V ~ 5.25 V
安装类型: 表面贴装
工作温度: 0°C ~ 85°C
封装/外壳: 84-LCC(J 形引线)
供应商设备封装: 84-PLCC
产品目录页面: 601 (CN2011-ZH PDF)
其它名称: 122-1046
R
XC3000 Series Field Programmable Gate Arrays
7-16
November 9, 1998 (Version 3.1)
Figure 15: Programmable Interconnection of Longlines. This is provided at the edges of the routing area.
Three-state buffers allow the use of horizontal Longlines to form on-chip wired AND and multiplexed buses. The left two
non-clock vertical Longlines per column (except XC3020A) and the outer perimeter Longlines may be programmed as
connectable half-length lines.
VCC
DA
DB
DC
DN
VCC
Z = DA DB DC ... DN
X3036
(LOW)
Figure 16: 3-State Buffers Implement a Wired-AND Function. When all the buffer 3-state lines are High, (high
impedance), the pull-up resistor(s) provide the High output. The buffer inputs are driven by the control signals or a Low.
D A
A
D B
B
D C
C
D N
N
D A A
+
=D B B
+ D C C
+
D N N
Z… +
X1741A
WEAK
KEEPER CIRCUIT
Figure 17: 3-State Buffers Implement a Multiplexer. The selection is accomplished by the buffer 3-state signal.
Product Obsolete or Under Obsolescence
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