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参数资料
型号： XC4013E-3PQ240C
厂商： XILINX INC
元件分类： FPGA
英文描述： XC4000E and XC4000X Series Field Programmable Gate Arrays
中文描述： FPGA, 576 CLBS, 10000 GATES, 125 MHz, PQFP240
文件页数： 4/17页
文件大小： 75K
代理商： XC4013E-3PQ240C
R
XC4000E and XC4000X Series Field Programmable Gate Arrays
6-112
February 11, 2000 (Version 1.8)
XC4000E Guaranteed Input and Output Parameters (Pin-to-Pin, TTL I/O)
Testing of switching parameters is modeled after testing methods specied by MIL-M-38510/605. All devices are 100%
functionally tested. Pin-to-pin timing parameters are derived from measuring external and internal test patterns and are
guaranteed over worst-case operating conditions (supply voltage and junction temperature). Listed below are representative
values for typical pin locations and normal clock loading. For more specic, more precise, and worst-case guaranteed data,
reecting the actual routing structure, use the values provided by the static timing analyzer (TRCE in the Xilinx Development
System) and back-annotated to the simulation net list. These path delays, provided as a guideline, have been extracted from
the static timing analyzer report. Values apply to all XC4000E devices unless otherwise noted.
Speed Grade
-4
-3
-2
-1
Units
Description
Symbol
Device
Global Clock to Output
(fast) using OFF
TICKOF
(Max)
XC4003E
XC4005E
XC4006E
XC4008E
XC4010E
XC4013E
XC4020E
XC4025E
12.5
14.0
14.5
15.0
16.0
16.5
17.0
10.2
10.7
10.8
10.9
11.0
12.6
8.7
9.1
9.2
9.3
9.4
10.2
10.8
5.8
6.2
6.4
6.6
6.8
7.2
7.4
–
ns
Global Clock to Output
(slew-limited) using OFF
TICKO
(Max)
XC4003E
XC4005E
XC4006E
XC4008E
XC4010E
XC4013E
XC4020E
XC4025E
16.5
18.0
18.5
19.0
20.0
20.5
21.0
14.0
14.7
14.8
14.9
15.0
15.1
15.3
11.5
12.0
12.1
12.2
12.8
13.0
7.8
8.2
8.4
8.6
8.8
9.2
9.4
–
ns
Input Setup Time, using IFF
(no delay)
TPSUF
(Min)
XC4003E
XC4005E
XC4006E
XC4008E
XC4010E
XC4013E
XC4020E
XC4025E
2.5
2.0
1.9
1.4
1.0
0.5
0
2.3
1.2
1.0
0.6
0.2
0
2.3
1.2
1.0
0.6
0.2
0
1.5
0.8
0.6
0.2
0
–
ns
Input Hold Time, using IFF
(no delay)
TPHF
(Min)
XC4003E
XC4005E
XC4006E
XC4008E
XC4010E
XC4013E
XC4020E
XC4025E
4.0
4.6
5.0
6.0
7.0
7.5
8.0
4.0
4.5
4.7
5.1
5.5
6.5
6.7
7.0
4.0
4.5
4.7
5.1
5.5
5.7
5.9
1.5
2.0
2.5
3.0
3.5
–
ns
Input Setup Time, using IFF
(with delay)
TPSU
(Min)
XC4003E
XC4005E
XC4006E
XC4008E
XC4010E
XC4013E
XC4020E
XC4025E
8.5
9.5
7.0
7.6
6.0
6.8
5.0
–
ns
Input Hold Time, using IFF
(with delay)
TPH
(Min)
XC4003E
XC4005E
XC4006E
XC4008E
XC4010E
XC4013E
XC4020E
XC4025E
0
–
ns
OFF = Output Flip-Flop, IFF = Input Flip-Flop or Latch
OFF
Global Clock-to-Output Delay
.
X3202
TPG
OFF
Global Clock-to-Output Delay
.
X3202
TPG
IFF
D
X3201
Input
Set - Up
&
Hold
Time
TPG
IFF
D
X3201
Input
Set - Up
&
Hold
Time
TPG
IFF
D
X3201
Input
Set - Up
&
Hold
Time
TPG
IFF
D
X3201
Input
Set - Up
&
Hold
Time
TPG
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PDF描述
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相关代理商/技术参数
参数描述
XC4013E-3PQ240C0119 制造商:Xilinx 功能描述:
XC4013E-3PQ240I 功能描述:IC FPGA I-TEMP 5V 3SPD 240-PQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:XC4000E/X 标准包装:1 系列:Kintex-7 LAB/CLB数:25475 逻辑元件/单元数:326080 RAM 位总计:16404480 输入/输出数:350 门数:- 电源电压:0.97 V ~ 1.03 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:900-BBGA，FCBGA 供应商设备封装:900-FCBGA（31x31） 其它名称:122-1789
XC4013E-3PQ240M 制造商:XILINX 制造商全称:XILINX 功能描述:XC4000E and XC4000X Series Field Programmable Gate Arrays
XC4013E-3TQ240C 制造商:XILINX 制造商全称:XILINX 功能描述:XC4000E and XC4000X Series Field Programmable Gate Arrays
XC4013E-3TQ240I 制造商:XILINX 制造商全称:XILINX 功能描述:XC4000E and XC4000X Series Field Programmable Gate Arrays
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