参数资料
型号: XCR3064XL-10CS48C
厂商: Xilinx Inc
文件页数: 4/12页
文件大小: 0K
描述: IC ISP CPLD 64 MCELL 3.3V 48-CSP
标准包装: 416
系列: CoolRunner XPLA3
可编程类型: 系统内可编程(最少 1K 次编程/擦除循环)
最大延迟时间 tpd(1): 9.1ns
电压电源 - 内部: 3 V ~ 3.6 V
逻辑元件/逻辑块数目: 4
宏单元数: 64
门数: 1500
输入/输出数: 40
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 48-FBGA,CSPBGA
供应商设备封装: 48-CSBGA(7x7)
包装: 托盘
CoolRunner XPLA3 CPLD
12
DS012 (v2.5) May 26, 2009
Product Specification
R
Revision History
The following table shows the revision history for this document.
Notice of Disclaimer
THE XILINX HARDWARE FPGA AND CPLD DEVICES REFERRED TO HEREIN (“PRODUCTS”) ARE SUBJECT TO THE TERMS AND
CONDITIONS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED AT http://www.xilinx.com/warranty.htm. THIS LIMITED
WARRANTY DOES NOT EXTEND TO ANY USE OF PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE
SPECIFICATIONS STATED IN THE XILINX DATA SHEET. ALL SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE.
PRODUCTS ARE NOT DESIGNED OR INTENDED TO BE FAIL-SAFE OR FOR USE IN ANY APPLICATION REQUIRING FAIL-SAFE
PERFORMANCE, SUCH AS LIFE-SUPPORT OR SAFETY DEVICES OR SYSTEMS, OR ANY OTHER APPLICATION THAT INVOKES
THE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). USE OF PRODUCTS IN CRITICAL APPLICATIONS IS AT THE SOLE RISK OF CUSTOMER, SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
Date
Version
Revision
02/20/00
1.0
Initial Xilinx release.
03/06/00
1.1
Minor updates.
11/30/00
1.2
Updated Macrocell numbering, I/O pins, and available packages.
02/09/01
1.3
Updated specification.
04/11/01
1.4
Under Features, changed Global 3-state to Universal 3-state. Added XCR3512XL device;
changed TSU numbers, added 324-pin Fineline BGA package, Programming Specs:
changed TINIT from 50 min. to 50 max., Quality & Rel. specs: added NPE for UMC
devices—10,000 cycles.
01/07/02
1.5
Table 7: Added Note 1, changed TINIT from 50 to 200 (max). Changed ICCP from 20 to 30
(max); updated Device Family Table 1 usable gate counts. Updated Device Family Table 2
package types, updated I/O cell section. Absolute Maximum Ratings table: Changed max
supply voltage relative to GND to 4.0V to match XC9500XL and UMC standard specs.
01/06/03
1.6
Added TPTCK parameter to timing model. Changed FSYSTEM for all devices in Table 1.
Changed from Advance Information to Preliminary. Added Note 1 to Figure 2 regarding
XCR3384XL TQ144 JTAG pins.
06/23/03
1.7
02/13/04
1.8
Added Maximum Soldering temperature (TSOL) specification. Added links.
09/29/04
1.9
Added text on shadow memory to first paragraph, page 2.
01/10/05
2.0
Changed Function Block input references to 40.
04/08/05
2.1
Add ICCSB Typical Specification
03/31/06
2.2
Added Warranty Disclaimer.
08/31/07
2.3
Added description of subthreshold power-up characteristics, page 6. Changes to Figure 7
and Table 3 on page 6 to describe subthreshold behavior. Add security description, page 6.
09/08/08
2.4
Removed PC44 and PCG44 packages. See Product Discontinuation Notice xcn07022.pdf.
05/26/09
2.5
Added note 3 to Table 2.
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XCR3064XL-10CS48I 功能描述:IC ISP CPLD 64 MCELL 3.3V 48-CSP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - CPLD(复杂可编程逻辑器件) 系列:CoolRunner XPLA3 标准包装:24 系列:CoolRunner II 可编程类型:系统内可编程 最大延迟时间 tpd(1):7.1ns 电压电源 - 内部:1.7 V ~ 1.9 V 逻辑元件/逻辑块数目:24 宏单元数:384 门数:9000 输入/输出数:173 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:208-BFQFP 供应商设备封装:208-PQFP(28x28) 包装:托盘
XCR3064XL-10CSG48C 制造商:Xilinx 功能描述:CPLD COOLRUNNER XPLA3 1.5K GATES 64 MCRCLLS 125MHZ 0.35UM 3. - Trays 制造商:Xilinx 功能描述:XLXXCR3064XL-10CSG48C IC SYSTEM GATE
XCR3064XL-10CSG48I 制造商:Xilinx 功能描述:XLXXCR3064XL-10CSG48I IC SYSTEM GATE 制造商:Xilinx 功能描述:CPLD COOLRUNNER XPLA3 1.5K GATES 64 MCRCLLS 125MHZ 0.35UM 3. - Trays
XCR3064XL-10PC44C 功能描述:IC ISP CPLD 64 MCELL 3.3V 44PLCC RoHS:否 类别:集成电路 (IC) >> 嵌入式 - CPLD(复杂可编程逻辑器件) 系列:CoolRunner XPLA3 标准包装:24 系列:CoolRunner II 可编程类型:系统内可编程 最大延迟时间 tpd(1):7.1ns 电压电源 - 内部:1.7 V ~ 1.9 V 逻辑元件/逻辑块数目:24 宏单元数:384 门数:9000 输入/输出数:173 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:208-BFQFP 供应商设备封装:208-PQFP(28x28) 包装:托盘
XCR3064XL-10PC44I 功能描述:IC ISP CPLD 64 MCELL 3.3V 44PLCC RoHS:否 类别:集成电路 (IC) >> 嵌入式 - CPLD(复杂可编程逻辑器件) 系列:CoolRunner XPLA3 标准包装:24 系列:CoolRunner II 可编程类型:系统内可编程 最大延迟时间 tpd(1):7.1ns 电压电源 - 内部:1.7 V ~ 1.9 V 逻辑元件/逻辑块数目:24 宏单元数:384 门数:9000 输入/输出数:173 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:208-BFQFP 供应商设备封装:208-PQFP(28x28) 包装:托盘