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| 型号： | XCS20-3TQ84I |
| 厂商： | Xilinx, Inc. |
| 英文描述： | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| 中文描述： | 斯巴达和Spartan - xL的家庭现场可编程门阵列 |
| 文件页数： | 31/82页 |
| 文件大小： | 863K |
| 代理商： | XCS20-3TQ84I |
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Spartan and Spartan-XL Families Field Programmable Gate Arrays
DS060 (v1.6) September 19, 2001
Product Specification
1-800-255-7778
R
Configuration Through the Boundary Scan
Pins
Spartan/XL devices can be configured through the bound-
ary scan pins. The basic procedure is as follows:
Power up the FPGA with INIT held Low (or drive the
PROGRAM pin Low for more than 300 ns followed by a
High while holding INIT Low). Holding INIT Low allows
enough time to issue the CONFIG command to the
FPGA. The pin can be used as I/O after configuration if
a resistor is used to hold INIT Low.
Issue the CONFIG command to the TMS input.
Wait for INIT to go High.
Sequence the boundary scan Test Access Port to the
SHIFT-DR state.
Toggle TCK to clock data into TDI pin.
The user must account for all TCK clock cycles after INIT
goes High, as all of these cycles affect the Length Count
compare.
For more detailed information, refer to the Xilinx application
note, "Boundary Scan in FPGA Devices." This application
note applies to Spartan and Spartan-XL devices.
Figure 31: Start-up Timing
UCLK_SYNC
UCLK_NOSYNC
CCLK_SYNC
CCLK_NOSYNC
CCLK
GSR Active
UCLK Period
DONE IN
Di
Di+1
Di+2
Di
Di+1
Di+2
U2
U3
U4
U2
U3
U4
U2
U3
U4
C1
Synchronization
Uncertainty
Di
Di+1
Di
Di+1
DONE
I/O
GSR Active
DONE
I/O
GSR Active
DONE
C1
C2
C1
U2
C3
C4
C2
C3
C4
C2
C3
C4
I/O
GSR Active
DONE
I/O
F = Finished, no more
configuration clocks needed
Daisy-chain lead device
must have latest F
Heavy lines describe
default timing
CCLK Period
Length Count Match
F
DS060_39_082801
C1, C2 or C3
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| XCS20-3VQ144C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS20-3VQ144I | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XCS20-3TQG144I | 制造商:Xilinx 功能描述:IC LOGIC CELLS |
| XCS20-3VQ100C | 功能描述:IC FPGA 5V C-TEMP 100-VQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Spartan® 标准包装:1 系列:Kintex-7 LAB/CLB数:25475 逻辑元件/单元数:326080 RAM 位总计:16404480 输入/输出数:350 门数:- 电源电压:0.97 V ~ 1.03 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:900-BBGA，FCBGA 供应商设备封装:900-FCBGA（31x31） 其它名称:122-1789 |
| XCS20-3VQ100I | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS20-3VQ144C | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS20-3VQ144I | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
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