参数资料
型号: XR16V554IVTR-F
厂商: Exar Corporation
文件页数: 10/43页
文件大小: 0K
描述: IC UART FIFO 16B QUAD 64LQFP
标准包装: 1,000
特点: *
通道数: 4,QUART
FIFO's: 16 字节
规程: RS232
电源电压: 2.25 V ~ 3.6 V
带自动流量控制功能:
带故障启动位检测功能:
带调制解调器控制功能:
带CMOS:
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-LQFP(10x10)
包装: 带卷 (TR)
XR16V554/554D
18
2.25V TO 3.6V QUAD UART WITH 16-BYTE FIFO
REV. 1.0.3
2.11
Internal Loopback
The V554 UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
Figure 11 shows how the modem port signals are re-configured. Transmit data from the transmit shift register
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX pin is held HIGH or mark condition while RTS# and DTR# are de-asserted, and CTS#,
DSR# CD# and RI# inputs are ignored. Caution: the RX input must be held HIGH during loopback test else
upon exiting the loopback test the UART may detect and report a false “break” signal.
FIGURE 11. INTERNAL LOOPBACK
TX A-D
RX A-D
M
ode
m
/
G
e
neral
Purp
ose
Co
ntro
lLogic
In
te
rn
al
Dat
aBu
sLi
nes
an
d
Co
ntro
lSi
gn
als
RTS# A-D
MCR bit-4=1
VCC
Transmit Shift Register
(THR/FIFO)
Receive Shift Register
(RHR/FIFO)
CTS# A-D
DTR# A-D
DSR# A-D
RI# A-D
CD# A-D
OP1#
OP2#
RTS#
CTS#
DTR#
DSR#
RI#
CD#
VCC
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