参数资料
型号: XR17D154IV-F
厂商: Exar Corporation
文件页数: 2/69页
文件大小: 0K
描述: IC UART PCI BUS QUAD 144LQFP
产品培训模块: UART Product Overview
标准包装: 60
特点: *
通道数: 4,QUART
FIFO's: 64 字节
规程: RS485
电源电压: 3.3V,5V
带自动流量控制功能:
带IrDA 编码器/解码器:
带故障启动位检测功能:
带调制解调器控制功能:
安装类型: 表面贴装
封装/外壳: 144-LQFP
供应商设备封装: 144-LQFP(20x20)
包装: 托盘
其它名称: 1016-1290
XR17D154
xr
UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
REV. 1.2.2
10
2.0 XR17D154 REGISTERS
The XR17D154 UART has three different sets of registers as shown in Figure 5. The PCI local bus
configuration space registers are for plug-and-play auto-configuration when connecting the device to the PCI
bus. This auto-configuration feature makes installation very easy into a PCI system and it is part of the PCI
local bus specification. The second register set is the device configuration registers that are accessible directly
from the PCI bus for programming general operating conditions of the device and monitoring the status of
various functions. These registers are mapped into 2K of the PCI bus memory address space. These functions
include all 4 channel UART’s interrupt control and status, 16-bit general purpose timer control and status,
multipurpose inputs/outputs control and status, sleep mode, soft-reset, and device identification and revision.
And lastly, each UART channel has its own set of 5G internal UART configuration registers for its own
operation control and status reporting. All 4 sets of channel registers are embedded inside the device
configuration registers space, which provides faster access. The following paragraphs describe all 3 sets of
registers in detail.
2.1
PCI LOCAL BUS CONFIGURATION SPACE REGISTERS
The PCI local bus configuration space registers are responsible for setting up the device’s operating
environment in the PCI local bus. The pre-defined operating parameters of the device are read by the PCI bus
plug-and-play auto-configuration manager in the operating system. After the PCI bus has collected all data
from every device/card on the bus, it defines and downloads the memory mapping information to each device/
card about their individual operation memory address location and conditions. The operating memory mapped
address location is downloaded into the Base Address Register (BAR) register, 0x10. The plug-and-play auto
configuration feature is only available when an external 93C46 EEPROM is used. The EEPROM contains the
device vendor and sub-vendor data required by the auto-configuration setup.
FIGURE 5. THE XR17D154 REGISTER SETS
Channel 0
INT, MPIO,
TIMER, REG
Device Configuration and
UART[3:0] Configuration
Registers are mapped on
to the Base Address
Register (BAR) in a 2K-
byte of memory address
space
PCI Local Bus
Target
Interface
Channel 0
Channel 1
Channel 2
Channel 3
Device Configuration Registers
4 channel Interrupts,
Multipurpose I/Os,
16-bit Timer/Counter,
Sleep, Reset, DVID, DREV
UART[3:0] Configuration
Registers
16550 Compatible and EXAR
Enhanced Registers
PCI Local Bus
Configuration Space
Registers for Plug-
and-Play Auto
Configuration
PCIREGS-1
Vendor and Sub-vendor ID
and Product Model Number
in External EEPROM
0x0000
0x0200
0x0400
0x0600
0x0080
0x07FF
0x0100
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