参数资料
型号: XR82C684CJTR/44-F
厂商: Exar Corporation
文件页数: 77/107页
文件大小: 0K
描述: IC UART CMOS QUAD 44PLCC
标准包装: 500
特点: *
通道数: 4,QUART
FIFO's: 3 字节
电源电压: 5V
安装类型: 表面贴装
封装/外壳: 44-LCC(J 形引线)
供应商设备封装: 44-PLCC(16.59x16.59)
包装: 带卷 (TR)
XR82C684
B
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
! $+
! $+0
$+
$+0
L :
L H%
L :
L H%
L :
L H%
L :
L H%
L < 3
L ;(,
L < 3
L ;(,
L < 3
L ;(,
L < 3
L ;(,
Table 19. Input Port Configuration Register 2 - IPCR2
$ /$ + , * 1 (# % * 3(,
E( ( 3 ( * - ( * % * %
% 3 Please note that the applicable bits, within each of the ACR registers, are shaded.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
)2
'
-( D '
! $+4
$
! $+
$
! $+
$
! $+
$
L
Table 4
L
L :
L
L :
L
L :
L
L :
Table 20. ACR1- Auxiliary Control Register 1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
)2
'
-( D '
! $+
$
! $+
$
! $+
$
! $+0
$
L
Table 4
L
L :
L
L :
L
L :
L
L :
Table 21. ACR2 - Auxiliary Control Register 2
(, $PBQ - $PBQ
Note:
This “two-tiered” interrupt enabling/disabling
approach, for the “Input Change of State” interrupt allows
tremendous flexibility for the user. Setting or clearing the
bits in ACR1[3:0] and/or ACR2[3:0] allows the user to
specify exactly which Input Port pins to be enabled (or
disabled) for generating the “Input Port Change of State”
interrupt.
Setting or clearing IMR1[7] and/or IMR2[7]
allows the user to “globally” enable or disable this
interrupt.
( * 3 $+% 3( ((' 3(' *
(, ( (% "(' /, * 1
3 ( * ' $+ ' (% % %
* % ( (% * # 3 (, *
$+%# ( % % /, * 1 (#
+ 3( (7
( (% ,,
*( % * ',(, ( (
E.3 44 Pin PLCC Packaged QUARTs
@@ ( +< '6, % ' 3( & *
( (%# $+# $+# $+0 $+ * # &
( *'( % ( (' (
% ( (%
*'( % * ' ' 5" ' '6 (%
( ( @@ ( +< '6, (
F. OUTPUT PORT
' %(%% * . ( +
+ ' % % , %
' % * ((, %% %(, % &
( & ,(, * ,(%% #
)# # ! # )# # ! %
' *(,( ,(%%# + + E %
%% %(, % + (%
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