参数资料
| 型号： | XRD9836ACG |
| 厂商： | Exar Corporation |
| 文件页数： | 8/32页 |
| 文件大小： | 0K |
| 描述： | IC 16B CCD/CIS SIG PROC 48TSSOP |
| 产品变化通告： | Leaded UART, V&I Obsolescence 11/Apr/2011 |
| 标准包装： | 39 |
| 位数： | 16 |
| 通道数： | 3 |
| 功率（瓦特）： | 500mW |
| 电压 - 电源，模拟： | 3 V ~ 3.6 V |
| 电压 - 电源，数字： | 3 V ~ 3.6 V |
| 封装/外壳： | 48-TSSOP（0.240"，6.10mm 宽） |
| 供应商设备封装： | 48-TSSOP |
| 包装： | 管件 |
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XRD9836
xr
16-BIT PIXEL GAIN AFE
REV. 1.0.0
16
ALTERNATE PIXEL OFFSET ADJUST
MODE (APOAM):
In some applications, alternate pixels along a scan
line come from two different rows of CCD’s, causing a
systematic offset between alternate pixels. When the
XRD9836 is operated in the Fixed Gain Offset Mode
(FGOM), it does not have the ability to compensate
for this alternating offset phenomenon.
To compensate for these offsets, this chip has an Al-
ternate Pixel Offset Adjust mode (APOAM), which
can be enabled by writing a 1 to the APOAM bit (D1of
the MODE register) through the serial port. In
APOAM mode each channel has four 10-bit offset
registers to control offset. Odd pixel offsets are com-
pensated for by the Dynamic Offset Register value
and the Fine Offset Register value. The even pixel off-
sets are compensated for by the APOAM Dynamic
Offset Register value and the APOAM Fine Offset
Register value. The individual channel pixel gains do
not change and are determined by the red, green and
blue PGA gain register settings.
The offset alternates every other pixel. The first pixel
and all odd pixels in the line use the dynamic offset
and fine offset register values. The even pixels use
the APOAM dynamic offset and the APOAM fine off-
set register values. Odd pixels are defined from the
first ADCLK after the fall of LCLMP.
In the PPGOM mode, the APOAM can be selected
only when Input Enable (IE) is disabled. The last dy-
namic gain and offset programmed using the OGI
port are used for the odd pixels.
The APOAM dynamic offset and the APOAM fine reg-
ister values, programmed through the USIO port are
used for the even pixels. The gain value is fixed as the
last received value through the serial port. This is
shown in Figure 14.
Note: LCLMP also defines which pixel is even or odd.
The first pixel after LCLMP goes inactive is odd. Posi-
tion LCLMP so that there are an even number of pix-
els before start of active pixels.
FIGURE 13. APOAM MODE - CONFIGURATION OF OFF-
SET
REGISTERS
CDS Signal
NC
CDS
Dynamic
10
BIT
+
PGA
10 Bit
3:1
MUX
ADC
Offset
DAC
Fine
10
BIT
Offset
DAC
Dyn. Reg.
APOAM Dyn. Reg.
Fine Reg.
APOAM Fine Reg.
SUMMARY OF APOAM USABILITY:
MODE
IE
APOAM
FIXED GAIN/OFFSET
OFF
USABLE
FIXED GAIN/OFFSET
ON
USABLE
PIXEL GAIN/OFFSET
OFF
USABLE
PIXEL GAIN/OFFSET
ON
NOT USABLE
TABLE 1: SUMMARY OF APOAM USABILITY
Figure 14. APOAM SYNCHRONIZATION AND REGISTER
ALTERNATION
VSAMP
DYNAMIC
OFFSET
FINE
OFFSET
LCLMP
ODD
EVEN
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相关代理商/技术参数 |
参数描述 |
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| XRD9836ACG-F | 功能描述:电信线路管理 IC RoHS:否 制造商:STMicroelectronics 产品:PHY 接口类型:UART 电源电压-最大:18 V 电源电压-最小:8 V 电源电流:30 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:VFQFPN-48 封装:Tray |
| XRD9836ACGTR-F | 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| XRD9853AIV | 制造商:EXAR 制造商全称:EXAR 功能描述:CCD Image Digitizers with CDS, PGA, and 10-bit A/D |
| XRD9855 | 制造商:EXAR 制造商全称:EXAR 功能描述:CCD Image Digitizers with CDS, PGA and 10-Bit A/D |
| XRD9855AIV | 制造商:EXAR 制造商全称:EXAR 功能描述:CCD Image Digitizers with CDS, PGA and 10-Bit A/D |
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