参数资料
型号: XRD98L62ACV-F
厂商: Exar Corporation
文件页数: 25/37页
文件大小: 0K
描述: IC CCD DIGITIZER 12BIT 48TQFP
标准包装: 250
位数: 12
通道数: 1
电压 - 电源,模拟: 2.7 V ~ 3.6 V
电压 - 电源,数字: 2.7 V ~ 3.6 V
封装/外壳: 48-TQFP
供应商设备封装: 48-TQFP(7x7)
包装: 托盘
31
Rev. P2.00
XRD98L62
Preliminary
One Shot (CAL Only) Mode
In this mode, the CAL signal is used to activate the DC
restore clamp and to define the optical black pixels for
calibration. The CAL pulse should frame the longest
group of OB pixels at either the end or beginning of
each line. The DC restore Clamp switch is turned ON
during the first four pixels of each CAL pulse. The
remaining pixels under the CAL pulse are used for
black level calibration.
End of Line N
Start of Line N+1
Active Video
Pixels
OB pixels
Vertical Shift
Dummy &
OB pixels
CAL
(Black Level)
CLAMP
(DC restore)
CCD
Signal
Active Video pixels
t
CAL
t
CLAMP
Vert. Shift Reject
(internal)
Disconnect CDS from
input pins
Figure 21. Line Rate Timing with OneShot=0, VSreject=1 & ClampCal=1
This mode also has an option to disconnect the CDS
from the input pins during the Vertical Shift time. To
enable this option write a “1” to the VSreject bit in the
Clock register. The signal at the CLAMP pin is used to
define the Vertical Shift period (i.e. the time when the
CDS is disconnected from the input pins).
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