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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
232
If the Change of State on Receive FERF Interrupt is enabled, then the XRT72L50 Framer IC will generate an
interrupt in response to either of the following conditions.
1. When the XRT72L50 Framer IC detects the FERF indicator, in the incoming DS3 data stream, and
2. When the XRT72L50 Framer IC no longer detects the FERF indicator, in the incoming DS3 data stream.
Conditions causing the XRT72L50 Framer IC to declare an FERF (Far-End-Receive Failure) condition
If the Receive DS3 Framer block (within the XRT72L50 Framer IC) detects some incoming DS3 frames with
both of the X bits set to “0”.
Conditions causing the XRT72L50 Framer IC to clear the FERF condition.
Whenever, the Receive DS3 Framer block starts to detect some incoming DS3 frames, in which the X bits
are not set to “0”.
Enabling and Disabling the Change of State on Receive FERF Interrupt:
To enable or disable the Change of State on Receive FERF Interrupt, write the appropriate value into Bit 3
(FERF Interrupt Enable) within the RxDS3 Interrupt Enable Register, as illustrated below.
Setting this bit-field to “1” enables this interrupt. Conversely, setting this bit-field to “0” disables this interrupt.
Servicing the Change of State on Receive FERF Interrupt
Whenever the XRT72L50 Framer IC detects this interrupt, it will do all of the following.
It will assert the Interrupt Request Output pin (Int) by driving it "High".
It will set Bit 3 (FERF Interrupt Status), within the Rx DS3 Interrupt Status Register, to “1”, as indicated
below.
Whenever the Terminal Equipment encounters a Change in FERF Condition on Receive Interrupt, it should do
the following.
1. It should determine the current state of the FERF condition. Recall, that this interrupt can generated,
whenever the XRT72L50 Framer declares or clears the FERF condition. Hence, to determine the current
RxDS3 Interrupt Enable Register (Address = 0x12)
BIT 7BIT 6BIT 5BIT 4
BIT 3BIT 2BIT 1BIT 0
CP Bit Error
Interrupt
Enable
LOS
Interrupt
Enable
AIS
Interrupt
Enable
Idle Interrupt
Enable
FERF
Interrupt
Enable
AIC
Interrupt
Enable
OOF
Interrupt
Enable
P-Bit Error
Interrupt
Enable
R/W
0
000
0
000
RxDS3 Interrupt Status Register (Address = 0x13)
BIT 7BIT 6BIT 5BIT 4
BIT 3BIT 2BIT 1BIT 0
CP-Bit Error
Interrupt
Status
LOS
Interrupt
Status
AIS
Interrupt
Status
Idle Interrupt
Status
FERF
Interrupt
Status
AIC
Interrupt
Status
OOF
Interrupt
Status
P-Bit Error
Interrupt
Status
RUR
RURRUR
0
000
1
000