参数资料
| 型号： | XRT73LC00AIVTR |
| 厂商： | Exar Corporation |
| 文件页数： | 22/61页 |
| 文件大小： | 0K |
| 描述： | IC LIU STS1/DS3/E3 SGL 44TQFP |
| 标准包装： | 1,000 |
| 类型： | 线路接口装置（LIU） |
| 驱动器/接收器数： | 1/1 |
| 规程： | DS3，E3，STS-1 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-LQFP |
| 供应商设备封装： | 44-TQFP（10x10） |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页当前第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页
XRT73LC00A
26
REV. 1.0.2
E3/DS3/STS-1 LINE INTERFACE UNIT
B. access the Microprocessor Serial Interface and write a “1” into the TXBIN (TRANSMIT BINary) bit-field in
Command Register 1.
After taking these steps, the Transmit Logic Block accepts Single-Rail data via the TPDATA input pin. The
XRT73LC00A samples this input pin on the falling edge of the TCLK clock signal and encodes it into the
appropriate bipolar line signal across the TTIP and TRING output pins.
NOTES:
1.
In this mode the Transmit Logic Block ignores the TNDATA input pin.
2.
If the Transmit Section of the XRT73LC00A is configured to accept Single-Rail data from the Terminal Equipment,
the B3ZS/HDB3 Encoder must be enabled.
Figure 13 illustrates the behavior of the TPDATA and TCLK signals when the Transmit Logic Block has been
configured to accept Single-Rail data from the Terminal Equipment.
2.2
The Transmit Clock Duty Cycle Adjust Circuitry
The on-chip Pulse-Shaping circuitry in the Transmit Section of the XRT73LC00A has the responsibility for
generating pulses of the shape and width to comply with the applicable pulse template requirement. The
widths of these output pulses are defined by the width of the half-period pulses in the TCLK signal.
Allowing the widths of the pulses in the TCLK clock signal to vary significantly could jeopardize the chip’s ability
to generate Transmit Output pulses of the appropriate width, thereby failing the applicable Pulse Template
Requirement Specification. The chips ability to generate compliant pulses could depend upon the duty cycle of
the clock signal applied to the TCLK input pin.
In order to combat this phenomenon, the Transmit Clock Duty Cycle Adjust circuit was designed into the
XRT73LC00A. The Transmit Clock Duty Cycle Adjust Circuitry is a PLL that was designed to accept clock
pulses via the TCLK input pin at duty cycles ranging from 30% to 70% and to regenerate these signals with a
50% duty cycle.
The XRT73LC00A Transmit Clock Duty Cycle Adjust circuit alleviates the need to supply a signal with a 50%
duty cycle to the TCLK input pin.
2.3
The HDB3/B3ZS Encoder Block
The purpose of the HDB3/B3ZS Encoder Block is to aid in the Clock Recovery process at the Remote Terminal
Equipment by ensuring an upper limit on the number of consecutive zeros that can exist in the line signal.
2.3.1
B3ZS Encoding
If the XRT73LC00A is configured to operate in the DS3 or SONET STS-1 Modes, then the HDB3/B3ZS
Encoder block operates in the B3ZS Mode. When the Encoder is operating in this mode, it parses through and
COMMAND REGISTER CR1 (ADDRESS = 0X01)
D4
D3
D2
D1
D0
TXOFF
TAOS
TXCLKINV
TXLEV
TXBIN
X
1
FIGURE 13. THE BEHAVIOR OF THE TPDATA AND TCLK INPUT SIGNALS WHILE THE TRANSMIT LOGIC BLOCK IS
ACCEPTING SINGLE-RAIL DATA FROM THE TERMINAL EQUIPMENT
TCLK
TPDATA
Data
1
0
相关PDF资料 |
PDF描述 |
|---|---|
| IDT72V3641L15PFG8 | IC SYNCFIFO 1024X36 15NS 120TQFP |
| IDT72V3641L15PF8 | IC SYNCFIFO 1024X36 15NS 120TQFP |
| VI-B61-IV-F2 | CONVERTER MOD DC/DC 12V 150W |
| VE-BNX-MY | CONVERTER MOD DC/DC 5.2V 50W |
| VI-B4Z-IV-B1 | CONVERTER MOD DC/DC 2V 60W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XRT73LC00AIVTR-F | 功能描述:网络控制器与处理器 IC RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| XRT73LC00IV | 制造商:EXAR 制造商全称:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC03A | 制造商:EXAR 制造商全称:EXAR 功能描述:3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73LC03A_08 | 制造商:EXAR 制造商全称:EXAR 功能描述:3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73LC03AES | 功能描述:网络控制器与处理器 IC RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
发布紧急采购，3分钟左右您将得到回复。