参数资料
| 型号： | XRT75R03DIVTR |
| 厂商： | Exar Corporation |
| 文件页数： | 70/135页 |
| 文件大小： | 0K |
| 描述： | IC LIU E3/DS3/STS-1 3CH 128LQFP |
| 标准包装： | 750 |
| 类型： | 线路接口装置（LIU） |
| 驱动器/接收器数： | 3/3 |
| 规程： | DS3，E3，STS-1 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 128-LQFP |
| 供应商设备封装： | 128-LQFP（14x20） |
| 包装： | 带卷 (TR) |
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XRT75R03D
I
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER
REV. 1.0.4
GENERAL DESCRIPTION .................................................................................................1
FEATURES .....................................................................................................................................................1
APPLICATIONS................................................................................................................................................1
FIGURE 1. BLOCK DIAGRAM OF THE XRT 75R03D ........................................................................................................................... 2
TRANSMIT INTERFACE CHARACTERISTICS ........................................................................................................2
RECEIVE INTERFACE CHARACTERISTICS ..........................................................................................................2
FIGURE 2. PIN OUT OF THE XRT75R03D......................................................................................................................................... 3
ORDERING INFORMATION .....................................................................................................................3
PIN DESCRIPTIONS (BY FUNCTION) ..............................................................................4
SYSTEM-SIDE TRANSMIT INPUT AND TRANSMIT CONTROL PINS .......................................................................4
TRANSMIT LINE SIDE PINS ..............................................................................................................................8
SYSTEM-SIDE RECEIVE OUTPUT AND RECEIVE CONTROL PINS ......................................................................10
RECEIVE LINE SIDE PINS ..............................................................................................................................17
GENERAL CONTROL PINS .............................................................................................................................18
CONTROL AND ALARM INTERFACE.................................................................................................................20
JITTER ATTENUATOR INTERFACE...................................................................................................................20
POWER SUPPLY AND GROUND PINS .............................................................................................................22
XRT75R03D PIN LISTING IN NUMERICAL ORDER..........................................................................................24
1.0 R3 TECHNOLOGY (RECONFIGURABLE, RELAYLESS REDUNDANCY) ........................................29
1.1 NETWORK ARCHITECTURE ......................................................................................................................... 29
FIGURE 3. NETWORK REDUNDANCY ARCHITECTURE ...................................................................................................................... 29
1.2 POWER FAILURE PROTECTION .................................................................................................................. 29
1.3 SOFTWARE VS HARDWARE AUTOMATIC PROTECTION SWITCHING ................................................... 29
2.0 ELECTRICAL CHARACTERISTICS ....................................................................................................31
TABLE 1: ABSOLUTE MAXIMUM RATINGS......................................................................................................................................... 31
TABLE 2: DC ELECTRICAL CHARACTERISTICS: ................................................................................................................................ 31
3.0 TIMING CHARACTERISTICS ..............................................................................................................32
FIGURE 4. TYPICAL INTERFACE BETWEEN TERMINAL EQUIPMENT AND THE XRT75R03D (DUAL-RAIL DATA) ....................................... 32
FIGURE 5. TRANSMITTER TERMINAL INPUT TIMING .......................................................................................................................... 32
FIGURE 6. RECEIVER DATA OUTPUT AND CODE VIOLATION TIMING ................................................................................................... 33
FIGURE 7. TRANSMIT PULSE AMPLITUDE TEST CIRCUIT FOR E3, DS3 AND STS-1 RATES................................................................. 33
4.0 LINE SIDE CHARACTERISTICS: ........................................................................................................34
4.1 E3 LINE SIDE PARAMETERS: ...................................................................................................................... 34
FIGURE 8. PULSE MASK FOR E3 (34.368 MBITS/S) INTERFACE AS PER ITU-T G.703 ......................................................................... 34
TABLE 3: E3 TRANSMITTER LINE SIDE OUTPUT AND RECEIVER LINE SIDE INPUT SPECIFICATIONS........................................................ 35
FIGURE 9. BELLCORE GR-253 CORE TRANSMIT OUTPUT PULSE TEMPLATE FOR SONET STS-1 APPLICATIONS............................. 36
TABLE 4: STS-1 PULSE MASK EQUATIONS ..................................................................................................................................... 36
TABLE 5: STS-1 TRANSMITTER LINE SIDE OUTPUT AND RECEIVER LINE SIDE INPUT SPECIFICATIONS (GR-253) .............................. 37
FIGURE 10. TRANSMIT OUPUT PULSE TEMPLATE FOR DS3 AS PER BELLCORE GR-499 ................................................................... 37
TABLE 6: DS3 PULSE MASK EQUATIONS ........................................................................................................................................ 38
TABLE 7: DS3 TRANSMITTER LINE SIDE OUTPUT AND RECEIVER LINE SIDE INPUT SPECIFICATIONS (GR-499) ................................. 38
FIGURE 11. MICROPROCESSOR SERIAL INTERFACE STRUCTURE...................................................................................................... 39
FIGURE 12. TIMING DIAGRAM FOR THE MICROPROCESSOR SERIAL INTERFACE ................................................................................ 39
TABLE 8: MICROPROCESSOR SERIAL INTERFACE TIMINGS ( TA = 250C, VDD=3.3V± 5% AND LOAD = 10PF) .................................. 39
FUNCTIONAL DESCRIPTION: ........................................................................................41
5.0 THE TRANSMITTER SECTION: ..........................................................................................................41
FIGURE 13. SINGLE-RAIL OR NRZ DATA FORMAT (ENCODER AND DECODER ARE ENABLED) ............................................................ 41
FIGURE 14. DUAL-RAIL DATA FORMAT (ENCODER AND DECODER ARE DISABLED) ............................................................................. 41
5.1 TRANSMIT CLOCK: ....................................................................................................................................... 42
5.2 B3ZS/HDB3 ENCODER: ................................................................................................................................. 42
5.2.1 B3ZS ENCODING: ...................................................................................................................................................... 42
FIGURE 15. B3ZS ENCODING FORMAT ........................................................................................................................................... 42
5.2.2 HDB3 ENCODING:...................................................................................................................................................... 42
FIGURE 16. HDB3 ENCODING FORMAT .......................................................................................................................................... 42
5.3 TRANSMIT PULSE SHAPER: ........................................................................................................................ 43
5.3.1 GUIDELINES FOR USING TRANSMIT BUILD OUT CIRCUIT: ................................................................................. 43
5.3.2 INTERFACING TO THE LINE: .................................................................................................................................... 43
5.4 TRANSMIT DRIVE MONITOR: ....................................................................................................................... 44
FIGURE 17. TRANSMIT DRIVER MONITOR SET-UP. ........................................................................................................................... 44
5.5 TRANSMITTER SECTION ON/OFF: .............................................................................................................. 44
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XRT75R03DIVTR-F | 功能描述:接口 - 专用 RoHS:否 制造商:Texas Instruments 产品类型:1080p60 Image Sensor Receiver 工作电源电压:1.8 V 电源电流:89 mA 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:BGA-59 |
| XRT75R03ES | 功能描述:时钟合成器/抖动清除器 3CH T3/E3/STS1LIU+JA 3.3V W/REDUNDANCY RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| XRT75R03IV | 功能描述:外围驱动器与原件 - PCI 3CHNNEL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| XRT75R03IV-F | 功能描述:外围驱动器与原件 - PCI 3-Ch E3/DS3/STS-1 RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| XRT75R03IVTR | 功能描述:时钟合成器/抖动清除器 3CHNNEL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
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