
YMF781
5
■
Overview of the Operation
APL-1 includes the Synthesizer Core, the CPU for control and its peripheral circuit.
The CPU controls most of the controls such as Synthesizer Core and Input/Output Port.
Since the Synthesizer Core controls are all controlled by the built-in CPU, sound contents can be played by a simple
command from the external.
The sound contents are stored in the external ROM.
Since the sound contents support formats in SMAF, SMAF/Phrase and SMAF/Audio, ROM data can be created by the
development tool dedicated for APL-1.
The firmware in the built-in CPU is stored in the external ROM and can be updated by the exchange of ROM, or by
the download via the APL-1 Control Interface.
Likewise, for the sound contents, it can be updated by the exchange of ROM, or by the download via the APL-1
Control Interface.
APL-1 Control Interface: Clock Sync Serial, Asynchronous Serial (UART), is incorporated and can be selected by the
terminal. (Mode 1)
Synthesizer
Core
(
MA-5)
Control CPU
APL-1
Flash-ROM
or ROM
AMP
Speaker
Output
UART
Clock
Sync Serial
DAC
+
VOL
EQ
VOL
Line out
CP
UI
Host CPU
Interface
Device
Mobile phone
PC
Memory card
Wireless communication
Sound Contents
Built-in CPU firmware
Note: A configuration diagram, which mode 1 is selected as an APL-1 Control Interface, is shown.
The download of the sound contents and the update of the APL-1 firmware are normally performed via the host CPU.
When it is difficult to mount a download function in host CPU, the download of sound contents and the update of the
firmware can be performed directly by using the asynchronous serial (UART). However, the connection destination is
restricted to PC Asynchronous Serial (UART).