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参数资料
| 型号： | YMF781-SZ |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封装： | LEAD FREE, PLASTIC, SQFP-100 |
| 文件页数： | 11/14页 |
| 文件大小： | 739K |
| 代理商： | YMF781-SZ |
YMF781
6
■
Block Diagram
Synthesizer
Core
（
MA-5）
Control CPU
RSTN
RX
D
(P11)
PD
TD
I
TD
O
TS
T0
-T
ST
1
TC
K
TMS
TR
S
T
N
RT
S
N
(P00)
Power-down
Controller
APL-1 Control Interface
T
X
D
(P10)
CT
S
N
(P01)
IR
Q
N
A2
1/
A0
(
P
35
)
D0
-D
15
RD
N
(
P
30)
WRN
(P34)
CS
0N
(P31)
CS
1N
(P32)
CS
2N
(P33)
L
B
N/LWRN
(
P
36)
UB
N
/UWRN
(
P
3
7)
A1
-A
20
LE
D
1
LE
D
2
AOL
AOR
VR
E
F
EQ1
EQ2
EQ3
SPOUT1
SPOUT2
XI
XO
Ti
m
in
g
Ge
n
era
to
r
SWR
N
(
P
2
2)
HS
E
L(P20)
SD
I(P26)
S
D
O
(
P
25)
SR
D
Y
N
(P23)
SCLKN
(P
24)
S
M
O
D
E
(P21)
SE
L
External Memory Interface
Boot ROM
Work RAM
Timer
WDT
Others
DAC
+
VOL
VO
L
EQ
VO
L
SPVDD
SPVSS
■
Overview of the block
The overview function of each block and the flow of a signal are explained.
Control CPU
The Control CPU controls APL-1 in all as well as the Synthesizer Core controls such as a sequencer function.
Synthesizer Core
Hybrid Synthesizer Core equivalent to MA-5, which is a synthesizer LSI for mobile phone.
The synthesizer performs play of the sound contents, LED controls, etc.
External Memory Interface
The interface connects APL-1 to the external memory.
Accessible memory space is up to 8MByte. (CS0N:４ＭByte＋CS1N:２ＭByte＋CS2N:２ＭByte.)
SRAM with the specification of byte access is necessary.
From P30-P37 can be used as the output port when only one external ROM is used.
APL-1 Control Interface
APL-1 is controlled through the APL-1 Control Interface.
Mode 1 and Mode 2 can be selected according to the settings of SEL terminal.
In Mode １, Clock Sync Serial and Asynchronous Serial (UART) can be switched and used by the HSEL terminal.
In Mode 2, Asynchronous Serial (UART) and command port (A mode, which identify command by the change of
data that inputted into P20-P26) can be used at the same time.
P01 and P11 can be used as input port, and P00 and P10 can be used as output port, depending on the settings.
Timing Generator
Clocks used in the APL-1 are generated.
Power-down Controller
The controller controls APL-1 in the power-saving mode.
Boot ROM, Work RAM, Timer, WDT, etc.
The peripheral devices of the Control CPU in the APL-1.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| YMF795 | 制造商:YAMAHA 制造商全称:YAMAHA CORPORATION 功能描述:APL-2 Automobile sound Player-2 |
| YMH025-02R | 制造商:YEONHO 制造商全称:YEONHO ELECTRONICS 功能描述:2.50mm PITCH CONNECTOR |
| YMH025-03R | 制造商:YEONHO 制造商全称:YEONHO ELECTRONICS 功能描述:2.50mm PITCH CONNECTOR |
| YMH025-04R | 制造商:YEONHO 制造商全称:YEONHO ELECTRONICS 功能描述:2.50mm PITCH CONNECTOR |
| YMH025-05R | 制造商:YEONHO 制造商全称:YEONHO ELECTRONICS 功能描述:2.50mm PITCH CONNECTOR |
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