参数资料
型号: ZPSD402A2-C-15L
元件分类: 微控制器/微处理器
英文描述: 32K X 16 UVPROM, 40 I/O, PIA-GENERAL PURPOSE, CQCC68
封装: CERAMIC, LDCC-68
文件页数: 103/128页
文件大小: 433K
代理商: ZPSD402A2-C-15L
PSD4XX Family
72
PSD4XX Family
10.0
Page
Register
The PSD4XX has a programmable security bit which offers protection from unauthorized
duplication. When the security bit is set, the contents of the EPROM, the PSD4XX
non-volatile configuration bits and ZPLD data cannot be read by EPROM programmers.
The security bit is set through the PSDsoft Software and is embedded in the compiled
output file. The security bit is UV erasable and a secured part can be erased and then
re-programmed.
11.0
Security
Protection
Figure 35. Page Register
DPLD
RS0
GPLD
ZPLD
ES0 – 3
PGR0
PGR1
PGR2
PGR3
R/ W
D0
D0 – D3
D1
D2
D3
Q0
Q1
Q2
Q3
PAGE
REG.
RESET
The Page Register is 4 bits wide and consists of four D flip flops.The outputs of the Register
(PGR0 – PGR3) are connected to the input bus of the ZPLD. By including the four outputs
as inputs to the DPLD, the addressing capability of the microcontroller is increased by a
factor of 16.
Figure 37 shows the Page Register block diagram. Inputs to the four flip flops are connected
to data bus D0-D3. The output of the Register can be read by the microcontroller. The
Register can operate as an independent register to the microcontroller if page mode is not
implemented.
相关PDF资料
PDF描述
ZPSD411A2V-C-20JI 32K X 8 OTPROM, 40 I/O, PIA-GENERAL PURPOSE, PQCC68
ZPSD413A1-C-15L 128K X 8 UVPROM, 40 I/O, PIA-GENERAL PURPOSE, CQCC68
ZPSD302V-B-20MI 32K X 16 OTPROM, 19 I/O, PIA-GENERAL PURPOSE, PQFP44
ZPSD302V-B-25M 32K X 16 OTPROM, 19 I/O, PIA-GENERAL PURPOSE, PQFP44
ZPSD403A2V-C-20U 64K X 16 OTPROM, 40 I/O, PIA-GENERAL PURPOSE, PQFP80
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