参数资料
型号: ZPSD402A2-C-15L
元件分类: 微控制器/微处理器
英文描述: 32K X 16 UVPROM, 40 I/O, PIA-GENERAL PURPOSE, CQCC68
封装: CERAMIC, LDCC-68
文件页数: 78/128页
文件大小: 433K
代理商: ZPSD402A2-C-15L
PSD4XX Family
49
PSD4XX Family
9.3.3 Address Out
For microcontrollers with a multiplexed address/data bus, the I/O ports in Address-Out
mode are able to provide latched address outputs (A0 – A15) to external devices. This
mode of operation requires the user to:
t Configuration
1. Declare the pins used as address line outputs in the ABEL file (PSDsoft).
2. Write “0” to the corresponding bit in the Control Register associated with each
I/O port.
3. Set the Direction Register to Output Mode.
9.3.4 Address In
There are two Address In modes:
1. For Port A - as other address line (A2-A7 and A16-A23) inputs to the DPLD. Additional
address inputs included in the EPROM decoding must come from Port A. The address
inputs are latched internally by ALE/AS if Multiplexed Bus is specified in PSDsoft.
2. For Ports C and D – as address inputs to the ZPLD for general decoding,
should not be used in EPROM decoding.
t Configuration
1. Declare pins or signals used as Address In in the ABEL file (PSDsoft).
2. Write latch equations in the .ABL file, e.g., A16.LE = ALE.
3. Include latched address in logic equations.
9.3.5 Data Port
In this mode, the port is acting as a data bus port for a microcontroller which has a
non-multiplexed address/data bus. The Data Port is connected to the data bus of the
microcontroller and the ADIO port is connected to the address bus.
t Configuration
Select the non-multiplexed bus option in PSD configuration (PSDsoft).
9.3.6 Alternate Function In
This mode is per-pin configurable and enables the user to define pin PE7 of Port E as
Automatic Power Down (APD) CLK input.
t Configuration
1. Select input functions in PSD configuration.
2. PSD Compiler assigns pins for the selected options.
The PSD4XX
Architecture
(cont.)
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